[time-nuts] Why are 1PPS signals so skinny?

[David]

On Tue, 15 May 2012 16:43:50 -0700, "Rick Karlquist"
<richard at karlquist.com> wrote:

>SAIDJACK at aol.com wrote:
>> Yes, but the point is to not use end-termination for all the reasons
>> mentioned by others in this thread, such as massive spike in power
>> consumption
>> once per second, over-voltage spikes if the termination is faulty or
>
>FWIW, the E1938A oscillator control board had a "happy light" LED
>that flashed 1 time per second, and sure enough this corrupted the
>power supply and affected some applications.  We added a command
>to turn it off.
>
>Rick Karlquist N6RK

One of the papers I read about implementing high performance FPGA
delay time counters mentioned the heartbeat LED causing a significant
amount of additional jitter.  I have always buffered such signals (for
other reasons as well like ESD resistance) and used separate power and
ground paths for the high current loop.