[time-nuts] Subject: Re: GPS 1PPS, phase lock vs frequency lock, design

Dana Whitlow k8yumdoober at gmail.com
Sun Jun 23 16:47:43 UTC 2019


Correction from Dana:

I meant "... without accumulation of phase error during normal times ...".

Sorry about that.

Dana


On Sun, Jun 23, 2019 at 11:45 AM Dana Whitlow <k8yumdoober at gmail.com> wrote:

> Leo,
>
> Are you saying that you want to abandon phase lock altogether in favor of
> freq
> lock?  Or just during the reacquisition following loss of and restoration
> of the
> reference?
>
> By me definition of pure freq lock, there will generally be some permanent
> (but varying)
> frequency error, so that phase error could accumulate without limit;
> clearly an undesirable
> thing in most applications.
>
> My interest lies in having a stable LO for receiving, without accumulating
> phase error (at least
> during times of missing reference).  When the reference goes away, I'll
> accept some phase
> error accumulation.  So for me, I think the best approach is phase lock
> under normal
> circumstances, but switch to freq lock during reacquisition of phase lock.
>
> Dana    K8YUM
>
> On Sun, Jun 23, 2019 at 9:01 AM Leo Bodnar <leo at leobodnar.com> wrote:
>
>> I have to draw your attention to practical aspects of why some designs
>> use FLL rather than PLL.
>>
>> Consider a GPS locked OCXO outputting GPS synced 10MHz signal.
>>
>> Properly designed control loop will not produce much (if any) difference
>> when the reference (GPS signal) is present.  In the end, integral of zero
>> is zero.
>>
>> When reference (GPS lock) is lost the things are very similar too,
>> holdover is just flying blind in the rough direction you were facing last.
>> Accumulating frequency and phase offset on the way.
>>
>> However, when reference is restored the things are much different.
>> After regaining the reference (which in case of GPS signal has
>> unambiguous absolute time embedded into its phase) *proper* PLL loop will
>> try to correct for slipped phase at the highest slew rate.  This can be
>> huge.  If phase has drifted 1ms apart the loop will have to slew the phase
>> all the way until it gets those 10,000 cycles out of the way.  This usually
>> looks ugly in frequency domain and is very disrupting if you are using the
>> device as frequency reference rather than an absolute time reference.
>>
>> Proper FLL loop will just gently (and reasonably quickly) get your
>> frequency back and forget about all the lost phase.  Which is what a lot of
>> users want.
>>
>> Initially, I have used PLL mode on GPS clocks that I am making, but
>> switched over to FLL during the last few years.
>>
>> Cheers
>> Leo
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>



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