[time-nuts] Subject: Re: GPS 1PPS, phase lock vs frequency lock, design

[Leo Bodnar]

Hi Dana,

I am just saying that, properly implemented, PLL and FLL are indistinguishable as long as output signal is concerned while lock is present and that the phase slew at regaining lock in PLL loop is counterproductive for one but necessary evil for others. I have a feeling that FLL is looked down upon by general public ever since PLL became a household term.

In a well designed  PID loop "I" term makes sure that you don't have "permanent but varying error."

All my messing about with loops, holdovers and recovery was pretty much with your application in mind.

Cheers!
Leo

> Are you saying that you want to abandon phase lock altogether in favor of freq
> lock?  Or just during the reacquisition following loss of and restoration of the
> reference?
> 
> By me definition of pure freq lock, there will generally be some permanent
> (but varying)
> frequency error, so that phase error could accumulate without limit;
> clearly an undesirable
> thing in most applications.
> 
> My interest lies in having a stable LO for receiving, without accumulating
> phase error (at least during times of missing reference).  When the reference goes away, I'll
> accept some phase error accumulation.  So for me, I think the best approach is phase lock
> under normal circumstances, but switch to freq lock during reacquisition of phase lock.
> 
> Dana    K8YUM