[time-nuts] GPS 1PPS, phase lock vs frequency lock, design

[Bob kb8tq]

Hi

Ok basic GPSDO. You need:

1) The GPS PPS, and it’s correction data
2) The OCXO
3) Something to drive the tuning voltage input to the OCXO
4) A way to compare the GPS PPS to the OCXO (usually to a PPS off of the OCXO)
5) Some sort of digital processing to implement the control loop. 

You have 1 and 2. A quiet reference plus a DAC is the common way to do 3. There are lots
of ways to do 4. With modern GPS modules, you would like a resolution < 100 ps. Just about 
anything you can program in C or assembler will work for 5. 

So, can you implement a sigma delta DAC in an FPGA? Sure you can. Will it be quiet enough 
all by it’s self …. hmmm…. The comparison circuit done all in the FPGA is also very doable. There
are a lot of “synthetic” processors you can drop into one. There also are FPGA chips with ARM cores 
built into them. 

Bottom line - yes, you *can* do it in an FPGA. That’s not to say it would be the best way to do it.

Bob

> On May 24, 2019, at 8:51 PM, life speed via time-nuts <time-nuts at lists.febo.com> wrote:
> 
> Hi all, it's been a while since I visited.  I am venturing into an unfamiliar area from my usual low phase noise PLL, OCXO and microwave synthesizer design endeavors.
> I recall there are some knowledgeable, well, time nuts on this list and hope you'll indulge some questions and maybe direct me to some appropriate white papers and share insights.
> I want to discipline a 10 MHz OCXO with 1PPS from GPS.  Obviously not an unusual application, but I need to understand the methodology as I will not be buying a module but rather implementing the design with an FPGA, off-the-shelf GPS chip and a high-quality 10MHz DOCXO.
> One of the first questions I have:  is it possible to implement phase-lock with a narrow digital PLL and DSP integrator/filter in the FPGA?  I suspect some 1PPS disiplined OCXO implementations are merely controlled to the same frequency, but not necessarily the same phase, depending on the details of the implementation.
> I need the output of two of these units I design to have to be phase coherent relative to each other.  Your knowledge, experience and scholarly references are welcome.
> Thanks,
> Lifespeed
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