[time-nuts] sub harmonic VCO locking

[glen english LIST]

Hi Attila

thanks for your input. and thanks for the links !

I'll meet my low-spec option using ADF4356 integer mode, and a 394 MHz 
off the self $2 SAW filter on the output.

That is what I'll do for the moment. I have the ADF4356 here on a eval 
board ADI lent me. It is not bad for an internal VCO chip. makes 126/ 
10k @ 400 megs.  Actually the Hittite HMC1033  is slightly better but 26 
weeks..... Discrete VCO using a TriTech TEM resonator (Q=400 400 MHz) 
was good also, with integer PLL chip. Maybe use a ceramic resonator up 
at 1.6 GHz where there is more Q and the chips are designed for the 1-4 
GHz VCO input (LTC6945 etc)

When I need to get the 5kHz  to 100kHz noise down, I'l probably go for 
direct multiplication.

73


On 8/1/2020 2:06 PM, Attila Kinali wrote:
> On Thu, 30 Jul 2020 21:56:42 +1000
> glen english LIST <glenlist at cortexrf.com.au> wrote:
> 
>> - a double-double-double could work, but my experience is for x2 x2 x2 I
>> really need to filter well at each stage to avoid sum and difference
>> products.. which might be OK for this application , especially if I
>> filter really well after the first x2 . but avoid if I can. filters at
>> 908 MHz need space, and shield cans where it is going.
> 
> Frequency multiplying would be probably the easiest to get low noise,
> followed by a well designed PLL system. Though -115dBc spurs is tough,
> 
>   
>> - and I dont know too much about phase noise and SRD or varactor
>> multipliers. but maybe that's an option.
> 
> SDR are prety low noise. From NLTLs we know that varactor systems can
> exhibit increased flicker noise levels (probably due to bias point
> instability).
> 
>   
>> - onboard VCO chip/PLLs have all sorts of unrelated spurs in the output.
>>
>> - sure I can use a good PLL and a external VCO, but if my N value is
>> fixed, and I can use injection locking, why bother with the PLL chip
>> that is likely to introduce PD related spurs anyway.
> 
> The generic way in this case is to build a PLL using frequency multiplier
> for the reference and a narrow loop filter after the phase detector.
> Placing zeros at the multiples of the (unmultiplied) reference frequency
> in the loop filter will reduce the spurs quite considerably.
> 
> 
> Injection locking is finicky. To injection lock, the resonator has to be
> pretty much on frequency to begin with, and kept that way. But unlike with
> other systems, you have no feedback system where get information how far
> off you are to control the frequency. Unless you build a hybrid system
> of an oscialltor with a Pound lock[5,6] (e.g. like cryogenic sapphire oscillators use[7])
> You want to read Adler's paper[1] at the very least before you start.
> A look at the work byHuntoon/Weiss[2] and Kurokawa[3,4] is probably also beneficial.
> 
> 
> 			Attila Kinali
> 
> [1] "A Study of Locking Phenomena in oscillators", by Robert Adler, 1946 (reprinted 1973)
> 
> [2] "Synchornization of Ocillators", By Huntoon and Weiss, 1947
> 
> [3] "Injection Locking of Microwave Solid-State Oscillators", by Kurokawa, 1973
> 
> [4] "Noise in Synchronized Oscillators", by Kurokawa, 1968
> 
> [5] "Electronic Frequency Stabilization of Microwave Oscillators", by Pound, 1946
> http://dx.doi.org/10.1063/1.1770414
> 
> [6] "Frequency-Stabilized Oscillator  Unit Notes and Instructions", by Lawrance, 1946
> https://dspace.mit.edu/bitstream/handle/1721.1/5024/1/RLE-TR-022-14254857.pdf
> 
> [7] "An Ultra-Low Noise Microwave Oscillator Based on a High-Q Liquid Nitrogen Cooled
> Sapphire Resonator", by Woode, Tobar, Ivanov, 1995
> 
>