[time-nuts] Dead 5065A - Some comments - Some questions... (III)

[Bob kb8tq]

Hi

Unless you are going to dig in and rebuild the microwave part of the physics package,
you are limited in terms of what you can or can’t do. The SRD setup seems to be a bit
unique in the 5065 so messing with it probably isn’t a good idea. 

Common wisdom is that there is a filter in the cavity match that is specific to 60 MHz.
Putting in 120 MHz apparently does not work well. I haven’t tried it so I’m just passing
on what I’ve heard. 

The 60 MHz is multiplied to the 6 GHz region. That increases it’s phase noise by the
well known 20 log N. With N > 100, noise on that side goes up by > 40 db. 

The “other” signal (normally 5.3x MHz) is mixed with the multiplied 60 MHz. The net
phase noise is the sum of the noise on the two carriers. You get the noise contribution
on both carriers at 137 Hz offset *and* the far remove noise on the 60 MHz at a 
5.3 MHz offset. 

All of that is just basic mix and multiply stuff. If a mixer didn’t transfer modulation that
way, a super heterodyne radio would have a really hard time doing it’s thing … ( = 
think of the 5.3x as the signal from the antenna and the 6.x GHz as the VFO input
to the mixer). 

Fun !!

Bob

> On Aug 27, 2020, at 4:36 AM, Magnus Danielson <magnus at rubidium.se> wrote:
> 
> Hej Ulf,
> 
> On 2020-08-26 09:09, Ulf Kylenfall via time-nuts wrote:
>> Paul,
>> 
>> A 60 MHz xtal oscillator divided by 12 and comparedwith the incoming 5 MHz. Then there is this thing
>> how to acheive a good symmetrical FM injecting
>> the 137 Hz signal without affecting the loop filterparameters.
>> 
>> Keeping the original design with modern typesof semiconductors is less work/effort, provided that the
>> unit keeps working...
>> The A7 original design used a non selective2nd harmonic detector. And uA 709's.That one was easy to motivate an upgrade.
>> 
>> I am a bit lazy otherwise.
> 
> OK, If you do a PLL loop of 60 MHz oscillator, well then you can just
> inject the 137 Hz into the loop just at the phase detector, assuming
> it's above the PLL bandwidth. If you the PLL bandwidth is higher, then
> you are on a 6 dB/Oct slope, but sure, for smaller range you can just
> compensate with the drive level. This is a known technology to do
> phase-modulation. You can be pretty lazy doing it after you gone through
> the trouble of doing a PLL-loop.
> 
> Using a higher frequency oscillator with low noise can reduce noise
> compared to the doubler/trippler chain. One could consider if not an
> even higher frequency should be considered.
> 
> If one plays that game, one should also consider the strategy of
> synthesizing two frequencies that then is combined at 6.8 GHz, as the
> noise of the two signals adds. Synthesizing a single frequency would be
> preferred, but then again, working within the limits of the current
> system might just work well enough. We can improve however by leaving 60
> MHz and see if we can find a more suitable higher frequency that would
> work equally well, as the need for low noise at higher frequencies has
> increased for similar enough purposes.
> 
>> 
>> As mentioned, the semiconductors that have failed
>> in A3 were all dated 1968.
>> At the time without knowing the exact types of the JFET'sI replaced them with 2N4416 only to discoverthat that was the type HP specified in a laterrevision of the A3.
> 
> Good to know. Thanks.
> 
> Cheers,
> Magnus
> 
> 
> 
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