[time-nuts] Phase Noise and ADCs

[Bob kb8tq]

Hi

In addition, the input to the ADC has it’s own noise issues. If you have a really
clean clock (or a poor ADC), the noise floor of the input may dominate the noise floor. 

Bob

> On Sep 26, 2020, at 12:28 PM, jimlux <jimlux at earthlink.net> wrote:
> 
> On 9/26/20 8:10 AM, John Ackermann N8UR wrote:
>> We know that phase noise scales with frequency, so if you multiply frequency by 10 you get a 20 dB increase in noise.
>> What I don't fully understand is how that relationship works with other than simple multiplication/division.
>> For example (and my real life concern), if I have an analog to digital converter that is clocked at 122.88 MHz and know the phase noise of that clock signal, what do I know about the effective phase noise when the ADC is receiving a signal at, e.g., 12.288 MHz?
> 
> To a first order, the ADC is like an ideal multiplier/mixer - phase noise on the clock contributes to phase noise on the sampled data by reciprocal mixing, just like a mixer.
> 
> 
> 
>> In other words, if I were to measure the phase noise at the output of the ADC when fed a high-enough quality 12.288 MHz signal, would I see something like the 122.88 MHz phase noise, or something better due to the scaling by 10?
>> Thanks!
>> John
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