[time-nuts] Re: PPS latency? User vs kernel mode

[Jürgen Appel]

Dear Javier,

On Monday, 13 December 2021 08:55:37 CET Javier Herrero wrote:

> I have not tried with Raspberry (and would not...), but in order to
> avoid interrupt latencies and jitter, my approach, using a Zynq, is:
> 
> - To implement a counter in the FPGA for use as the Linux clock source,
> instead of the ARM timer

> - Implement harware timestamping on the PPS, and generate the interrupt
> (and since I was there, I use an external clock source for the counter
> like the GPSO that gives also the PPS signal, instead of the usually
> crappy XO that drives the Zynq clocks)

> - And then have a lot of fun convincing the kernel to use the FPGA
> counter as clock source, and converting raw PPS timestamp times to wall
> clock in the kernel, to be able to give a good timestamp value to ntp/chrony
> 
> I have implemented this approach both using a u-blox M8F (using the
> 30.72MHz signal as source for the timer clock), and using a 10MHz GPSDO.

That sounds very interesting. I've been tinkering with the Red Pitaya platform 
(not for timing purposes though). Do you have any pointers as to what's 
necessary to convince the Kernel to use a counter in the Programmable Logic as 
timer?

Also, Do you know something about the hardware time-stamping using the Zynq 
Ethernet controller? Or even a project connecting an SFP module to a Zynq?

Cheers,
	Jürgen