[time-nuts] Re: PPS latency? User vs kernel mode
Hal Murray
halmurray at sonic.net
Thu Dec 23 02:48:55 UTC 2021
folkert at vanheusden.com said:
> Are you sure about the user-kernel crossings? Because (not 100% sure) I
> thought wiringpi access the gpio pins directly - iirc they're memory mapped
> (strace doesn't show any system calls) on ARM processors.
Ahh. Thanks for the heads up. I haven't done any bit-banging with the GPIO
stuff yet but I want to.
I was trying to suggest a way to compare your polling approach with the
traditional interrupt method. How about this:
Turn off NTP (so it doesn't fiddle with the clock).
Collect some data with your polling approach.
Collect some data by watching the kernel:
Do you know about /sys/devices/virtual/pps/pps0/assert ?
Your polling loop will probably heat things up so you probably want to monitor
the crystal temperature.
Then try running them both at the same time.
Try moving the polling around to different CPUs to see if you can find which
CPU is doing the interrupt processing. There is probably a way to figure that
out.
If you haven't discovered it yet, htop is a wonderful tool. For things like
this, it tells you which CPU your polling job is running on.
--
These are my opinions. I hate spam.
More information about the Time-nuts_lists.febo.com
mailing list