[time-nuts] Re: Death of a Capacitor

Lux, Jim jim at luxfamily.com
Mon Sep 27 13:55:06 UTC 2021


On 9/27/21 2:57 AM, Gerhard Hoffmann wrote:
>
> Am 27.09.21 um 10:16 schrieb nuts at lazygranch.com:
>> I've only designed one LDO as a discrete chip (as opposed to a 
>> portion of a chip where performance just has to be good enough), so I 
>> have no guru status. That said, what spikes pass through a LDO if you 
>> do it right is simply a capacitor divider comprised of the 
>> capacitance across the pass device and the filter capacitor. This is 
>> a bit more predictable with a PFET pass than a PNP. 
> FET and predictable does not go together well. FET data sheets are 
> seldom more than a page and normally don't promise hard limits. And 
> then, like for the IF3602 there comes V2 with reduced claims after 20 
> years, much more like what we used to measure in real life, still 
> slightly optimistic.
>
>> https://www.analog.com/en/products/lt3045.html You can see the PSRR 
>> after a point (200kHz) rolls off and appears to flatten. I assume the 
>> error amp is out of loop gain. It goes flat for a while. The idea 
>> here is the drive on the pass device is constant and just maintains 
>> the DC voltage. The AC rejection is mostly due to capacitance ratios. 
>> This being a bipolar pass device there is some secondary effect here 
>> where after 2MHz the rejection improves then goes flat again.
> I would not call nearly 80 dB PSSR  to 2 MHz bad. And @ 2MHz it is no 
> longer really needed. A simple, cheap RC/LC pole does wonders there 
> given it has some decades to develop its attenuation.

Actually, I like that it still has significant rejection even higher.  
Sure a single RC or RLC has good effect, but you can use smaller L and C 
to get the same "whole circuit" rejection.  What we've done with these 
is set the voltage of the regulator a few tenths higher to account for 
the IR drop in the LC filters (which have parasitic R in the L) so that 
the "at load" voltage is right. For most of the MMIC RF ampliifers, the 
bias current is essentially constant (changing with temperature) since 
we're in a (very) small signal Class A regime. The change in bias with 
temperature (and any gain change too) gets calibrated out later - 
because what's important to me is "quiet" from 0.1 to 30 MHz, and in 
particular, suppressing 700-800 kHz (and harmonics) from the upstream 
DC/DC converters.






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