[time-nuts] Re: RCB-F9T Adapter PCB with USB and 50 Ohm Timepulse SMA Connectors

[John Ackermann N8UR]

On 8/22/22 15:59, John Sloan via time-nuts wrote:

>> Have you had any issues with unmatched transmission line effects?
> 
> Being an embedded software engineer in the telecom field, I’m probably not qualified to answer that question. But I did cause the board to reset when I tried putting 50 Ohm terminators on the TP1 and TP2 SMA connectors. When I did this I checked the SparkFun schematic and dimly recall that there is a resistor between each TP output pin and the corresponding output pin (if you choose to solder on a header) on the board, and that this connection is in parallel with the SMA connector, which has no resistor at all. So I am inclined to agree with you (despite my ignorance).

I have had issues with various NEO-M8 and ZED-F9 boards when running the 
TP at a high (RF) rate, and driving more than a foot or two of coax into 
a digital, presumably high impedance, input.

I think there are two related problems:

50 ohm coax driving a high impedance load is going to ring all over the 
place if given a chance.  I found that putting an in-line 50 ohm 
terminator at the far end cleaned the waveform up very nicely.  That's 
not unique to u-blox, it's just a fact of life.

But with a terminator, the amplitude becomes marginal to trigger the 
logic at the far end.  I suspect that's the u-blox not able to source 
enough current to get a solid logic transition through the terminator, 
and buffers should help.

There are newer and maybe better solutions, but on TAPR PPS projects 
we've stuck with a design that Tom Clark came up with, paralleling 
several (usually 3) 74AC04 inverters each with a 22 ohm resistor on its 
output.  [ Originally Tom used 47 ohms thinking that would be better for 
50 ohm coax, but all the higher resistance does is lower the voltage 
available. 22 ohms works well and gives more oomph at the output. ]

The resistors may not do any one thing perfectly, but they provide 
something resembling a source termination as well as equalize current if 
the gates don't all trip at exactly the same time.  Whatever the theory, 
it seems to provide a fairly robust output that can drive coax and 
deliver a useful output at the far end.  As far as I've ever been able 
to measure, the 74AC delay/jitter doesn't have any noticeable detriment 
to the real world rise time.

As Bob said, this topic has been discussed a lot over the years and it's 
really tough to reach an optimum solution because there are so many 
different use cases.  The parallel AC04 gates have worked well for us.

Note that a potential issue with modern hardware is 3.3V GPS systems 
trying to drive 5V logic inputs.  That doesn't give you a whole lot of 
margin for termination loss.  Fortunately, everything I need to plug in 
to these days seems to be happy with 3.3V levels.

John
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