[time-nuts] Re: Crazy Clock

[Adrian Godwin]

On Fri, Dec 16, 2022 at 12:49 AM Alexander Huemer via time-nuts <
time-nuts at lists.febo.com> wrote:

> influenced. What is lacking is a set of 3 absolute position rotary
> encoders with 6° resolution like described at [1] which referenced [2].
> Somebody^{TM} should put such a clock together. 3 such encoders, a
> stepper motor with gears to arrive at 6°, the rest is just software.
>

Yes, but mechanically is an expensive way to make a small memory. This is
why I suggested a nonvolatile ram/eeprom. It can be in the clock or in the
clock controller : the difference between those is that in the latter,
cabling faults cause memory loss.

The key point is that you align it once (at manufacture) and thereafter
writes (ticks) change both mechanical and electronic representations and
reads (on recovery) read only the electronic one. If a synchronome clock
with a capacitative impulse is used, it can probably be designed to
function even over a power failure synchronised with the tick.

The downside is difficulty of doing DST adjustments, especially autumn, But
since that's not wanted and the only correction is recovery forwards after
a power failure, it fits nicely. I don't know if you need to know that it's
stopped/recovering but a status led could show that.

 Another option is to do as Alexander says and fit mechanical
feedback/readout. But it could be simplified with a top-dead-centre marker
- the extra information from encoders is nice to have, but at a cost. TDC
wil give you an alignment check every 12 hours and can, again, indicate
that it's uncalibrated if there have been power failures since the last
check.

I think one of the Synchronome competitors did this using a write-only
protocol. As the hour approached, a special signal was sent that put the
clock mechanically on the exact hour and then the next pulse restarted it
from there. However you need to tolerate a short synchronising error every
hour which sounds as though it wouldn't suit your needs.