[time-nuts] Re: Noise down-converter project

[ed breya]

Now that I have the "official" filter in place, I can wrap up the LF/DC 
issues. This is the other extreme, so no SA here, just time domain view 
with a Tek 7A22 vertical, which gets down to 10 uV/div, and has settable 
BW steps from 100 Hz to 1 MHz. For very low f and DC, I use a HP3456A. 
There are some limits, especially in the 7A22, which is a little flaky, 
but mostly puts on a good show. In either instrument, there may be 
errors caused by the large HF part of the noise up to the 25 MHz or so, 
way beyond what they're trying to see.

One thing that immediately showed up is the mixer DC offset (about -1.2 
mV) due mostly to imperfections in the mixer, distortion in the LO, and 
LO leakage into where it doesn't belong. I built a photo-voltaic 
circuit to generate a current to cancel it out, but had to wait until 
other issues were settled before final design adjustments.

Why a PV generator? This relates to the fundamental design plan. You may 
recall that in the earlier talk on the mixer, I wanted to be able to 
have galvanic isolation of the IF port, in order to eliminate or reduce 
ground loop interference. Indeed, I found out right away that this was 
the way to go. On the 7A22, I could see several mV of line-related junk, 
and figured it was time to lift the IF off ground. For the RF 
experimenting, I had the IF chassis-grounded, but had all the provisions 
in place to float the whole works, from the IF port all the way to the 
front panel BNC. I chose to overdo the capacitance from the IF common to 
earth, with two 100 nF caps. The common-mode chassis noise disappeared, 
as expected.

But, all this forces various compromises between the requirements. 
First, there's not much point in making a thing that can go essentially 
all the way down to DC, and possibly at very tiny signal levels 
(depending on BW and noise power level), if you can't convey the signal 
to an external piece of gear or experiment without ground loop 
interference. So, this isolation is necessary - it raises the 
common-mode impedance of the source so that the (hopefully) small 
inter-chassis voltages can't push much current between equipment.

But, this is all frequency dependent too. If the ground loop 
interference has higher frequency content (like in something with a SMPS 
that's not very clean), the caps isolating the floating section present 
much lower CM impedance, allowing more current. For this, you'd want 
minimal CM capacitance.

But, minimal CM capacitance is minimally effective in shorting out the 
LO and RF at the mixer - whatever leaks through due to the limited 
isolation of the mixer becomes CM and additional IF signal at the IF 
port. For this, you'd want as high a CM capacitance as possible, or 
solid ground (which is the non-isolated form).

So, it all boils down to making appropriate trade-offs in that CM 
capacitance. As mentioned earlier, I started with 200 nF, which was 
sufficient for line/harmonic interference rejection, and was a good RF 
short at the mixer. Next, I tried a lower extreme of 2 nF total, which 
would have been great for medium frequency rejection, but alas, not a 
good enough short for the LO and RF, indicated by increasing power at 
the output, and increasing DC offset - it nearly doubled it.

The present compromise is about 9 nF total (the previous 2 nF plus three 
2200 pF tacked on). This seems to be pretty good, with reasonably small 
(maybe -90 dBm) LO showing, and only slightly higher offset compared to 
the 200 nF version. I think when all's said and done, I'll end up with 
about a 10-20 nF compromise value.

There's also some CM choking involved. The most important one isolates 
the LO and RF CM right at the IF port, formed with three loops (about 10 
uH) through a ferrite toroid of the SMB pigtail cable the goes to the 
filter. A second one will be included on the output cable to the front 
panel, to help at the medium to high frequencies.

I edited the box's board ground plane to form the isolated section that 
carries the filter, padding, associated interconnects, and PV generator 
circuits. Since this all floats, the PV method is used, and no power 
supplies or chassis ground returns (which would spoil it) are needed. 
The generator is two paralleled 4N37 opto-isolators operating in PV 
mode, with variable LED drive for setting the offset current.

The concept of "floating" is somewhat arbitrary. In reality, the whole 
output could float to any applied voltage until something breaks down, 
but I decided it was safest to just hard-clamp it to chassis ground with 
Si rectifiers (1N5401). Unfortunately, their zero-bias capacitance adds 
to the total CM capacitance, while they can't help with any RF shorting 
at the mixer - they're too big to fit near there, and are too far 
removed from the action by distance and the CM choke.

Next up will be more details. It's getting close to the end. I can tell 
that it's near time to wrap up or quit this project, because the 
connectors are starting to wear out from all the puts and takes of the 
box into the instrument - I'd say it's well over a hundred times already.

Ed