[time-nuts] 5 MHZ PIC PPS Divider?

[Hal Murray]

> a ECL 8-Bit Ripple Counter. And a 1Ghz oscillator make the measurement
> of  differences. This should get me to the 1ns level ? 

Or try a FPGA...

They run at 250 MHz so all you need is 4 clock phases.

The other approach would be to make a delay line that's longer than a single 
clock and has many FFs along the way.  I'm not sure how to calibrate that and 
keep it calibrated as power/temp change.


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