[time-nuts] Digital PLL ICs, alternatives and digital loop filters
jmiles at pop.net
Sat Dec 16 20:01:45 EST 2006
Yeah, for one OCXO disciplining another, I'd just use a 74F90 and 74HCT4046,
like that quick-and-dirty design did. The loop gain will be low and the
integration period will be measured in seconds or even minutes, so I don't
believe noise is going to be worth worrying about. It would be hard to
screw up too badly in this scenario.
As far as modern chips go, the ADF4002 is a new favorite of mine. It's
capable of very high performance at N and R ratios down to 1... but it will
require a microcontroller. You also need to be comfortable doing your own
loop design for it. (I am suspicious that ADIsimPLL has a bug that gives
misleading results with small KVco values, but am not entirely sure about
-- john, KE5FX
----- Original Message -----
From: "Didier Juges" <didier at cox.net>
To: "Discussion of precise time and frequency measurement"
<time-nuts at febo.com>
Sent: Saturday, December 16, 2006 2:50 PM
Subject: Re: [time-nuts] Digital PLL ICs,alternatives and digital loop
> John Miles described a clean 110 MHz PLL from a 5.5 MHz source, which he
> used in his tracking generator project.
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