[time-nuts] PLL Phase Noise vs. Divider Jitter
Matt Ettus
boyscout at gmail.com
Sat Jul 8 17:44:30 UTC 2006
> > In the previous thread, "HP 58540A Phase Noise Improvements", Matt Ettus
> > noted the following:
> >
> > The jitter that is added by a divider would most probably pose a greater
> > limit to the phase noise of the PLL than that of the specific OCXO used.
>
> This sounds a little strange. Most of the jitter will be filtered out by the
> PLL loop filter. Since we discuss OCXO we are discussing fairly moderate
> frequencies (5-20 MHz) and acheiving low jitter dividers should not be a
> problem.
Low jitter dividers still have phase noise floors higher than what
he's looking for. Check out the "figure of merit" in modern PLL
chips.
Matt
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