[time-nuts] How to measure Allan Deviation?
Didier Juges
didier at cox.net
Mon Oct 23 04:33:39 UTC 2006
Dr Bruce Griffiths wrote:
> Didier Juges wrote:
>
>> Dr Bruce Griffiths wrote:
>>
>>
>>> Didier Juges wrote:
>>>
>>>
>>>
>>>> Dr Bruce Griffiths wrote:
>>>>
>>>>
>>>>
>>>>
>>>>> In principle this measurement could be made with a time interval counter:
>>>>> PPS -> START
>>>>> delayed 10KHz -> STOP
>>>>>
>>>>> Vary the delay and watch the jitter jump when the leading edge of the
>>>>> PPS signal occurs during the 10KHz burst which was phase coherent with
>>>>> the previous PPS pulse.
>>>>> The only problem is finding a suitable variable delay device with
>>>>> sufficiently low (<=1ns??) jitter.
>>>>>
>>>>>
>>>>>
>>>>>
>>>>>
>>>>>
>>>> The delay device can be triggered by the 1 PPS, then will drive the ARM
>>>> input of the counter, so as long as the delay device's jitter is less
>>>> than the 10 kHz period, if we adjust the delay to 0.99985 second
>>>> (between the last 2 periods of 10 kHz before the 1 PPS), then the TI
>>>> counter will START on the last 10 kHz pulse before the pps, and STOP on
>>>> the 1 PPS.
>>>> Tek has some time delay generators in the TM-500 and 7000 plug-in
>>>> series. I knew one day I would need one of those, I now know why :-)
>>>>
>>>> Didier
>>>>
>>>>
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>>>>
>>>>
>>>>
>>>>
>>>>
>>> Since the HP5370 arm input is high impedance(1 Megohm) and its input
>>> range lies betwen -2V and +2V its desirable to drive it from a back
>>> terminated source with an amplitude of 2V or less to avoid overdriving
>>> (the comparators are better behaved if the input signal remains within
>>> the specified range) the input and ensure that the pulse at the ARM is
>>> relatively clean and reflection free. A suitable buffer can be built
>>> using 3 74AC04 inverters as depicted below: The 74AC04 inverters load
>>> currents are well within the specified limits even if the buffer output
>>> is shorted to ground. Thus the driver should have a long service life.
>>> ARM driver
>>>
>>>
>>> Bruce
>>> ________________
>>>
>>>
>> The trigger levels on the 5370 are strange. The normal inputs have
>> trigger levels that can be adjusted between -1.5 and +0.6 V or something
>> like that.
>> I am not sure where that is coming from.
>> For the ARM input, if someone is going to drive it with long coax
>> cables, the best would be a 50 ohm termination right at the instrument's
>> input.
>> The schematic did not make it, but I believe I understand what you mean:
>> 3 gates with common input, each output has a 150 ohm series resistor and
>> the outputs (far end of the resistors) are tied together, to provide a
>> good 50 ohm drive to the cable. A series capacitor would probably be
>> recommended to center the signal around ground (assuming it's 50% duty
>> cycle).
>>
>> Didier
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>>
>>
>>
> Didier
>
> The trigger level limits are derived from the input amplifier and
> trigger circuit characteristics for the START and STOP inputs.
>
> The ARM input feeds directly (via a 1X FET buffer) to an ECL comparator
> ((MC1651).
> This comparator has an NPN longtailed pair input stage the
> characteristics of which determines the usable input signal range.
> Driving an amplifier or comparator input stage into saturation degrades
> its timing characteristics somewhat.
>
> Bruce
>
>
I understand that the levels are what they are due to the use of ECL
logic, I was wondering from a user's perspective, was the 5370 intended
to be used only with ECL logic circuits? I am surprised that they did
not design a trigger range that included at least the "old" normal TTL
levels 0 to 5V. TTL was very common when the 5370 was designed (it uses
a lot of it internally, not so much in the timing circuits though)
Didier
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