[time-nuts] Gate propagation delay jitter

Enrico Rubiola rubiola at femto-st.fr
Tue Apr 10 18:14:01 EDT 2007


> Then we would need to know/measure the jitter of the retiming  
> flipflop.
Expected values
microwave: -120 dBrad^2/Hz flicker, -150 dB white
RF:                -140 dBrad^2/Hz flicker, -150 dB white
Use a double balanced mixer, traditional configuration.
A correlation scheme is probably not  necessary.

On the understanding side, aliasing is the beast to kill.
A logic gate shows a gain g<>0 (analog gain!!!) during the
edges, for it behaves as a sampling system -> increased
noise bandwidth, due to aliasing.

William Egan wrote an illuminating article, Transact. UFFC
(1990 in my notebooks, 1992 in my memory, sorry)

> There appears to be little definitive published data on the jitter of
> various logic gates and flipflops.
I know.  Fred L. Walls did some work, proc. Freq. Control Symp,
I don't remember when.

> Consequently a simple reliable method of measuring such jitter  
> would be
> useful.
See above

Whoever has data, please send.

Cheers,

Enrico



Enrico Rubiola
professor of electronics

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