[time-nuts] 10MHz to 32MHz?

[Dr Bruce Griffiths]

Neville Michie wrote:
>> Hi All,
>>     
> another method that avoids PLL and other sources of phase noise is to  
> divide down to 2MHz, get a square wave signal,
> low pass it to make a rough sine wave, feed it into a full wave  
> rectifier, (pair of diodes) and the fundamental is eliminated and  
> only even harmonics are left.
> Lowpass to make rough sine wave  of 4 MHz and repeat three more times.
> The full wave rectifier provides a MOD function of the sinewave,  
> which has a DC offset and harmonics 2, 4, 6 etc.
> This may be a low phase noise way of converting the frequencies.
> Cheers, Neville Michie
>   
Neville

The phase noise performance will still be limited by the performance of 
the divider (unless a regenerative divider is used -however these are 
relatively complex, and accurate alignment is required for low phase 
noise performance).
As such the phase noise performance will be no better than that obtained 
by extracting the desired harmonic from the divider output.
Obtaining a low noise 50% duty cycle square wave by dividing 10MHz by 5 
isn't possible.
However a 40% duty cycle reduces the fundamental (2MHz) only slightly.
One doubler could be eliminated by filtering out the second harmonic, 
however an easily achievable 20% duty cycle would be better.
Diode doublers usually require an amplifier to get achieve sufficient 
output, if a pair of JFETS are used as a double instead of the diodes 
then an amplifier isn't required.

Bruce