[time-nuts] 10MHz to 32MHz?

Bob Paddock bob.paddock at gmail.com
Mon Apr 23 06:06:07 EDT 2007

On Monday 23 April 2007 03:56, Don Collie wrote:

> The thing that puzzles me is: why is the plot of  
> VCO voltage versus time different when locking from below to locking from 
> the same initial frequency difference when locking from above. It`s a pity 
> you can`t predict PLL lockup characteristics using linear algebra - or do 
> you need a particular kind of phase [or frequency] detector that would 
> enable you to do this?

Has anyone ever worked with  Vasil Uzunoglu's Synchronous Oscillators?
See US Patents: 4274067, 4335404, 4356456

A couple of other articles about Sync.Osc can be found here:


Sync. Osc's are good where you need to lock to a single

 http://www.softwaresafety.net/ http://www.designer-iii.com/

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