[time-nuts] Of rubidium life and piggy-bank anemia....

Bruce Griffiths bruce.griffiths at xtra.co.nz
Sat Dec 1 21:24:29 UTC 2007


Poul-Henning Kamp wrote:
> In message <4751C857.6020104 at xtra.co.nz>, Bruce Griffiths writes:
>
> You guys could save a lot of time if you read my paper where all
> this is described in detail:
>
> 	http://phk.freebsd.dk/pubs/timecounter.pdf
>
>   
Poul

This paper addresses virtually none of the hardware design issues at all.
If you actually use "latches" as shown in the diagram on page 8 where
the latch sampling is enabled by the synchroniser output transition this
is usually considered to be an example of bad design practice.
The accepted technique would employ gated D flipflop registers where the
synchroniser output transition is converted to a single clock cycle
pulse employed as the enable for the gated D register which is
continuously clocked by the counter (and synchroniser) clock.

Bruce




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