[time-nuts] Austron PRR-10 GPS discliplined Rb...

[David I. Emery]

On Sun, Jan 28, 2007 at 11:43:11AM +1300, Dr Bruce Griffiths wrote:
> The DDS will need to have an internal clock of at least 30MHz or so to 
> generate a usable 10MHz output.

	Agreed, assuming the chip doesn't do clock multiplication as
several do...

> Although theoretically it is possible to generate 10MHz from a DDS 
> clocked at 20MHz, in practice the necessary brick wall analog 
> reconstruction filter is unrealisable.

	Given my option 1 (DDS clocked at 20 mhz) and NO clock multiplication
the phase comparison with the input could easily be at say 5 mhz or 1 mhz
without degrading anything very much I shouldn't think.   Should be obvious
on a scope doing the reverse engineering of course...

	Of course for phase comparison with the input, one actually does not
need much filtering as one is only using the NCO digital output as an input
to a phase comparator... spurs and so forth don't count at all here as they
get filtered out in the subsequent loop filter for the PLL (which is very
narrow).


-- 
   Dave Emery N1PRE,  die at dieconsulting.com  DIE Consulting, Weston, Mass 02493
"An empty zombie mind with a forlorn barely readable weatherbeaten
'For Rent' sign still vainly flapping outside on the weed encrusted pole - in 
celebration of what could have been, but wasn't and is not to be now either."