[time-nuts] Low noise frequency multiplication

Dr Bruce Griffiths bruce.griffiths at xtra.co.nz
Fri Mar 2 12:06:00 UTC 2007


Stephan Sandenbergh wrote:
> Hi Said,
>
> The DDS idea that you (and Ulrich) suggest sounds like a good plan.
> However, to me your predictions sound overly optimistic.
>
>   
>> Said wrote:
>>     
>
>   
>> But let's say these are as good as advertised, and for me that would mean
>> say better than -95dBc/Hz at 10Hz offset from 1GHz carrier, then by reduction
>> through the DDS, we would theoretically get -20dB below this, or -115dBc/Hz at
>> 100MHz output.
>>     
>
> Phase noise of -115dBc/Hz @ 10Hz for a 100MHz carrier sounds a bit
> steep when compared to one of Wenzel's ultra low noise ULN series
> which achieves -125dBc/Hz @ 100Hz. (these oscillators are probably the
> best you can buy). I guess it will probably climb to about -112dBc/Hz
> @ 10Hz. Your prediction postulate that the close-in phase noise of two
> devices, the digitally down divided 100MHz and the state-of-the-art
> 100MHz low-noise oscillator, will be comparable. I don't mean to
> contradict you, since I am really not an expert, but this spec sounds
> a little suspect. Maybe there is something I am missing? If this spec
> is correct, I am strongly considering it.
>
> I agree with Ulrich that the best solution is probably dependent on
> the application. So let me explain my situation:
>
> I need a 100MHz reference to clock a radar system. In other words,
> I'll be clocking a DDS and some ADCs. Thus, I need low high frequency
> jitter (i.e. low noise floor). I also phase-lock (this is a digital
> PLL) the 100MHz to a 2.4GHz PLL for the carrier. The radar does
> Doppler measurements on the carrier – so I need low close-in phase
> noise. I would also like to operate the radar bi-statically (Tx and Rx
> not co-located). This requires the carrier phases of the two radar
> stations to be synced. Thus, I am concerned with good Allan deviation.
> Quite a tall order – I admit!
>
> I'm using Analog's AD9512 to distribute the clocks to the different
> devices. It provides low skew outputs and the LVPECL has got the
> following additive phase noise specs: (I hope this table display
> correctly)
>
> LVPECL Outputs        10MHz OCXO           10x Multiplied            Diverence
> Hz        dBc/Hz               dBc/Hz                       dBc/Hz
>          dBc/Hz
>
> 1          ?                        -100
> -80                        17
> 10        -127                    -130                            -110
>                      13
> 100      -145                    -152                            -132
>                     13
> 1k        -153                    -160                            -140
>                      13
> 10k      -158                    -165                            -145
>                      13
> 100k    -158                     -165                            -145
>                      13
> 1M       -158                     -165                            -145
>                       13
>
> You can see from the figure that by multiplying the GPS disciplined
> 10MHz by 10 I will be about 13dBs short of the AD9512's potential. For
> the moment, the noise limit of the AD9512 should be adequate because
> at these levels because noise in other parts of the radar will then
> start to dominate. However, I will certainly want to max out the
> AD9512's potential.
>
> I could lock the 10MHz to a 100MHz OCXO. However, this will probably
> have to be done digitally – out of cost view point. Do you think a
> digital PLL will do? Or will the digital dividers add to much noise?
> Maybe the DDS idea? Or should I stick to the multiplier idea?  Analog
> multipliers are awfully expensive to digital alternatives.
>
> I couldn't really find specs to compare the performances of the
> different ideas yet.
>
> Regards,
> Stephan.

Stephan

One has to take into account the phase noise characteristics of digital 
dividers which will fall short of your expectations.
The 20dB per decade is the theoretical improvement with an ideal 
divider, real dividers fall well short of this especially when you get 
close to the carrier  of a divided down ultra low phase noise oscillator.

Digital phase locking of a 10MHz and a 100MHz OCXO will degrade the 
performance below that achievable by analog multiplication of the 10MHz 
to 100 MHz and then phase locking with an analog phase detector and PLL.

One other approach is to use conjugate regenerative dividers to divide 
the 100MHz by 10 and then phase lock with an analog phase lock loop.
Correctly adjusted a conjugate regenerative divider degrades the phase 
noise much less than a digital divider. However a conjugate regenerative 
divider is a little tricky to adjust. It would probably be necessary to 
cascade a divide by 2 and a divide by 5 as a direct divide by 10 
conjugate regenerative divider may be a little too difficult to adjust 
for low phase noise operation. Conjugate regenerative dividers can be 
built for any frequency for which suitable mixers and low noise 
amplifiers exist.

When the 10MHz is multiplied by 10 an offset of 1Hz becomes an offset of 
10Hz, so you have to be careful when calculating the theoretical phase 
noise at 100MHz.

A well designed analog multiplier has a lower phase noise than any 
digital divider, so as Wenzel has shown the lowest phase noise method of 
locking a 10MHz and a 100MHz OCXO (other than using conjugate 
regenerative dividers) is in fact to multiply the 10MHz to 100MHz and 
then phase lock the resultant 100MHz OCXO to the multiplied 10MHz signal 
using an analog phase lock loop.

Cost aside the lowest phase noise fixed frequency microwave clock would 
be generated by using a sapphire whispering gallery resonator oscillator 
divided down to the required frequency using regenerative dividers.

It would appear that you may need a better 10MHz reference.

How far apart are the RX and Tx antennas likely to be?
It begins to sound as though GPS carrier phase disciplined OCXOs may be 
very useful for both the Rx and Tx  systems.

Bruce




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