[time-nuts] Happy Holidays

Bruce Griffiths bruce.griffiths at xtra.co.nz
Sat Dec 27 00:50:47 UTC 2008


Richard

Richard H McCorkle wrote:
> Bruce,
>
> Thank you for your critical evaluation of the interpolator circuitry.
> I have no doubt that further improvements to the design are possible
> and hope to inspire other amateurs on the list to come up with an
> improved interpolator design. The circuit shown provides good results
> with very low temperature sensitivity, and I recommend building one
> and testing it your self before saying it needs further work to be
> useable. What I found in 7 months of testing different variations of
> the interpolator (including biased and commutating diode versions as
> you have suggested) were:
>
>   
I wouldn't waste my time with a circuit that  is inherently as non
linear as yours.
A simulation quickly shows its shortcomings as does you linearity plot.
I've built many interpolation circuits over the years and can see little
purpose in building something with such poor performance.
Especially when a better design requires no extra components, other than
a couple of resistors.
I learned how to do it correctly decades ago.
You comments are misguided, the effect of the substantial base current
of the saturated switches is far from negligible.
> 1. A high-gain constant current source provides the best ramp linearity.
> 2. Larger capacitors with higher currents produced better stability
>    with less effect from stray capacitance.
> 3. A saturated differential switch had the least effect on ramp
>    linearity of numerous switching arrangements tested.
>   
Rubbish, what about the base current of the saturated switch?
Try a real current source drive such as that I suggested and you'll see
how much better it is.
> 4. With a saturated switch the voltage span across the capacitor can be
>    maximized so minimum amplification of the sample voltage is required.
>   
If you want to use such a switch at least use a FET for which the gate
current is essentially negligible.
> 5. Minimum amplification of the sample voltage minimizes the temperature
>    sensitivity as voltage variations due to capacitance changes with
>    temperature are not amplified.
>   
Get real using +1200ppm/C tempco carbon resistors negates this.
> 6. A differential switch provided faster turn-off switching and less
>    sample “droop” at turn-off than using a high-speed commutating diode.
>
>   
Differential drive only works well when the 2 complementary drive
signals are accurately aligned.
Whilst this is inherent in ECL and current mode logic, it isnt
guaranteed for CMOS logic.
>   The transistor switching time is not as critical in this design as
> there is always a sample at least 1 clock cycle in duration. 
Nonsense, the temperature coefficient of the switching delay of a
saturated switch is relatively large.
> Using a
> saturated switch insures it has minimum effect on the charge current
> delivered to the capacitor by the high-gain constant current source.
>   
Rubbish, it affects the charge substantially.
> Slower turn-on times reduce the minimum count returned, reducing the
> data offset, but as long as the turn-on time is consistent and less
> than 1 clock cycle in duration the switch is fully saturated and the
> ramp is linear at the beginning of the sample period and has little
> effect on the data. A slower turn-off time due to saturation increases
> the maximum count returned but as long as the transistor turn-off
> time is consistent and the maximum sample voltage is below current
> source saturation the data span is linear and consistent.
>   When a high-speed switching diode was used instead of the
> differential switch the diode conducted for a longer period than
> the switch transistors and reduced the sample voltage from its
> peak value. 
Only because the bias and drive for the switching  transistor were
inappropriate.
> With similar transistors in the differential switch
> the voltage ramp stops abruptly with no turn-off “droop” evident
> in testing. Choice of capacitors is left to the user but 5%
> tolerance NPO/COG or mica caps should be used for best temperature
> stability. The discharge switch can be replaced with any suitable
> device but the 2N7000 switches in 10ns, is readily available, 
So are 74HC05's.
> low cost,
> and with large sample capacitor values has minimal effect on the data
> returned. Testing of the charge linearity without the differential
> switch was performed on a similar design with the results shown in
> the attached file. The linearity with a saturated differential switch
> in the actual interpolator is similar but has not been documented yet.
>
> Richard
>
>   
The capacitor charging current in your design is not as well defined as
it should be, the capacitor charging current in the "operating region"
is about 4.5mA the rest of the 10mA from the current source is lost as
base current in the saturated switch.

Bruce
>   
>>> Bruce Griffiths wrote:
>>> Your analog interpolator needs a little work.
>>> The switching speed of the 2N3906's is so slow because the 2N3906's that
>>> switch the current to ground or into the 470pF cap are saturated.
>>> They will switch much faster if used as current mode switches.
>>> In fact you can just replace the 2N3906 whose collector is connected to
>>> the 470pF cap with a fast switching diode and the current source will be
>>> switched much faster.
>>> The 2N7000's have a relatively high non linear output capacitance
>>> replacing them with something like 1/6X 74HC05 would be better.
>>> The 470pF silver mica caps will have relatively large dielectric absorption.
>>> NP0/C0G caps would be a better choice, particularly if higher input
>>> pulse rates were to be used.
>>>
>>> Have you actually measured the linearity of the interpolator?
>>>
>>>
>>> Bruce
>>>
>>>
>>>
>>>       
>> The quickest fix is to drop the differential drive to the 2N3906's and
>> bias the base of the 2N3906 whose collector is connected to the 470pF
>> cap at +2.5V.
>> This will ensure the 2N3906's switch much faster.
>> The maximum voltage on the 470pF cap should be about 1V to avoid
>> saturating the transistor whose collector is connected to it.
>> The opamp gain network should then be adjusted to produce the required
>> output swing.
>> If the maximum charging time of the capacitor is 400ns then the charging
>> current should be about 4.7E-10/4E-7 or about 1.2mA.
>> The 2N3906's will switch a bit faster if the current is increased to 5
>> or 10mA in which case the 470pF cap should be replaced by a ~2nF cap
>> (with 5mA charging current).
>> Use an NP0/C0G for low dielectric absorption.
>>
>> Bruce
>>
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