[time-nuts] Count up/down DAC circuit
Hal Murray
hmurray at megapathdsl.net
Tue Dec 30 14:41:42 UTC 2008
> As part of the current idea I have with the hockey-pucks, I'm thinking
> about feeding the D1 and U1 phase difference pulses out of an MC4044
> out to some circuit that could clock up and down an analog output
> which would ultimately go to the EFC of a ocxo, IE D1 pulses when the
> phase of one input signal is advanced and visa versa for the U1 pin.
> Anyone seen a circuit like that please?
I assume that "clock up and down an analog output" means an up/down counter
driving an A/D.
Digital logic needs a min pulse width on clocks.
The best I can think of right now would be to use each pulse to set a FF, run
them through a synchronizer (pair of FFs), then bump the counter and clear
the initial FF. That is, build a small circuit running on another clean
clock that looks for the input pulses.
--
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