[time-nuts] Frequency divider design critique request

Richard W. Solomon w1ksz at earthlink.net
Thu Jul 10 20:33:21 EDT 2008


The TrueTime XL-AK Time & Frequency Receiver does just what you want plus
a few more outputs. Unfortunately they do not provide schematics in the
manual. 

73, Dick, W1KSZ

-----Original Message-----
>From: "David C. Partridge" <david.partridge at dsl.pipex.com>
>Sent: Jul 10, 2008 1:30 PM
>To: 'Discussion of precise time and frequency measurement' <time-nuts at febo.com>
>Subject: [time-nuts] Frequency divider design critique request
>
>As I've mentioned before, I've been working on the design of a frequency
>divider to go with my TB.
>
>The idea is 10MHz sine in from TB, output 2.5Vp-p 50% duty cycle square wave
>into 50R (5V into 1M), at 10Mhz, 5MHz, 1MHz and decade selectable 100kHz
>down to 1Hz.  All rising edges synchronised to the 10MHz clock rising edge
>(or as near as I can get with 74AC logic).   With a considerable amount of
>constructive criticism from Bruce Griffiths (thank you again Bruce) I
>believe the design now to be complete.   
>
>The aim is to have as low a level of nasties as possible (i.e. fit for
>time-nuts).
>
>All faults are my own - no blame attaches to Bruce!
>
>I've not yet subjected this design to the ultimate simulation tool (PCB,
>parts and solder) yet, and I have no means to test it for levels of jitter
>(phase noise) or similar nasties.
>
>I think that it's now the right time to open the design up for critique from
>a wider audience before I commit it to copper.
>
>I'm therefore attaching the design as a PDF file for your comments.
>
>A few comments are in order:
>
>1) The 5Mhz and 1MHz outputs are re-clocked TWICE deliberately to delay them
>by one clock cycle so they line up with the 1MHz and lower outputs.
>
>2) The selected output (at the '4051 mux) from the ripple counter chain is
>re-clocked to 1MHz before re-clocking to 10MHz as the worst-case delay in
>the chain of '4017s is large enough that the lower frquencies wouldn't
>reliably re-clock directly to 10MHz.  
>
>I have also done a PCB layout (4-layer) and I'm happy to send a print of the
>top/bottom layers to anyone who feels that they want to comment on that
>(inner layers are ground and power).
>
>Let the brick-bats be thrown!
>
>Cheers
>Dave
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>07:37





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