[time-nuts] Frequency divider design critique request

John Miles jmiles at pop.net
Tue Jul 15 14:44:11 EDT 2008


Right; when the thumbswitches are toggled, the RC integrators will slow down
the edges into pins 9-11.  Sometimes CMOS parts will latch up or otherwise
fail to reliably with slow edges -- it probably comes down to the
"complementary" thing, where both halves of a totem pole can turn on
erratically during a slow transition.

I have seen large capacitors used on TTL MUXes for EMI suppression, but
never on CMOS.  I have a feeling 100 pF would be safer and still adequate.
Probably no big deal, but if you want to be anal about it, it could pay to
check the edge-time specs for the HC family.

-- john, KE5FX

> -----Original Message-----
> From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com]On
> Behalf Of David C. Partridge
> Sent: Tuesday, July 15, 2008 11:07 AM
> To: 'Discussion of precise time and frequency measurement'
> Subject: Re: [time-nuts] Frequency divider design critique request
>
>
> John,
>
> This is just DC selection of which MUX line is active.
>
> Am I missing something here?
>
> Dave
>
> -----Original Message-----
> From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On
> Behalf Of John Miles
> Sent: 15 July 2008 18:30
> To: Discussion of precise time and frequency measurement
> Subject: Re: [time-nuts] Frequency divider design critique request
>
> I don't know about sending edges that slow into a CMOS chip.  Is that
> considered kosher for HC-series logic?
>
> -- john, KE5FX
>
> > -----Original Message-----
> > From: time-nuts-bounces at febo.com
> > [mailto:time-nuts-bounces at febo.com]On Behalf Of David C. Partridge
> > Sent: Tuesday, July 15, 2008 10:16 AM
> > To: 'Discussion of precise time and frequency measurement'
> > Subject: Re: [time-nuts] Frequency divider design critique request
> >
> >
> > Magnus,
> >
> > Was the attached what you had in mind?
> >
> > Thanks
> > Dave
> >
>
>
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