[time-nuts] quick and very dirty phase comparator

[Ulrich Bangert]

Bruce,

> Even a DDS followed by a PLL cleanup loop (10811 plus analog PD etc.) 
> should work well although with a binary tuning word obtaining 
> an exact 
> 10.00001MHz (or alternatively 9.99999 MHz) output isnt 
> possible. A DDS has some advantages over a synthesizer using 
> dividers in that 
> additional noise isnt aliased into the output.

Since I am well familiar with the Analog Devices DDS circuits, this has
been my very first idea. The most simple one for that purpose would be a
AD9851 (180 MHz, 32 Bit, built in clock multiplier). But when I used the
DDS design tool available on the AD web pages I received a big warning
saying that using a "clock X multiplier" frequency that is a near
integer of the output frequency generates lots of unwanted spurs. Which
was new to me since I do so in my GPSDO but should they not know better?
This is why I dropped the thoughts on DDS.

Best regards
Ulrich Bangert

> -----Ursprungliche Nachricht-----
> Von: time-nuts-bounces at febo.com 
> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Bruce Griffiths
> Gesendet: Mittwoch, 4. Juni 2008 10:44
> An: Discussion of precise time and frequency measurement
> Betreff: Re: [time-nuts] quick and very dirty phase comparator
> 
> 
> Ulrich Bangert wrote:
> > Bruce,
> >
> > thank you for correcting me. Here I have clearly fooled myself. 
> > However your posting originated some new ideas: With the 
> GCD becoming 
> > THAT low an analogue phase lock to a 10 MHz reference will not be 
> > easy. But if we stop to think about phase locked VCXOs we need not 
> > bother anymore about odd exotic xtal frequencies
> Yes you would need a VCXO with low close in phase noise for the 
> 17.73447MHz source.
> That crystal frequency isnt too exotic as RS components have suitable 
> crystals, if you build your own VCXO.
> >  at all that may generate us a GCD of 10.
> > Instead we are free to choose for example 10000010 Hz for the 
> > controller's frequency. Which brings us back to a construction of a 
> > good offset generator.
> >
> > Until now I have believed that a good (low phase noise, high 
> > stability) offset generator would involve
> >
> > a) a number of single sideband mixers (as described in
> > www.horology.jpl.nasa.gov/papers/fssa.pdf)
> >
> > or
> >
> > b) the well known offset synthesizer circuitry as described by Rick 
> > Karlquist.
> >
> > I am sure that both ideas work excellent, although I am 
> unsure whether
> > a) can generate an 10 Hz offset. However, both methods involve 
> > circuitry that I would not call exactly "quick and dirty" and their 
> > use would overstress the try to make something really 
> simple. On a new 
> > internet search for "offset generator" I came over this one:
> >
> >   
> 10Hz offset by method a is trivial (9.99999MHz is just as useful as 
> 10.00001MHz):
> 
> 1) Use a LSB mixer to mix 10MHz with 10MHz/1000 to generate 9.99MHz
> 
> 2) Bandpass filter this and then use a USB mixer to mix 9.99MHz with 
> 9.99MHz/1000 to generate 9.99999MHz.
> 
> 3) Use a PLL to phase lock a low noise VCXO (spare 10811A or similar 
> detuned mechanically by 10Hz??) to the 9.99999MHz output to 
> remove spurs 
> etc.
> 
> Even a DDS followed by a PLL cleanup loop (10811 plus analog PD etc.) 
> should work well although with a binary tuning word obtaining 
> an exact 
> 10.00001MHz (or alternatively 9.99999 MHz) output isnt 
> possible. A DDS has some advantages over a synthesizer using 
> dividers in that 
> additional noise isnt aliased into the output.
> > 
> www.diva-portal.org/diva/getDocument?>
urn_nbn_se_liu_diva-1838-1__fullt
> > ex
> > t.pdf 
> >
> > What do you think about that topology? Let the "IF in" be 
> the needed 
> > offset and the "offset OSC" be our 10 MHz reference. Would that not 
> > make an really easy way to generate an precise offset with 
> the wanted 
> > features?
> >
> >   
> Not much (can work well with 20kHz offset but not with 10Hz offset), 
> direct generation mixing 10Hz with 10MHz like this requires a 
> rather low 
> PLL bandwidth.
> Also filtering out the unwanted sideband may be problematic.
> 
> > Best regards
> > Ulrich Bangert
> >
> >   
> Bruce
> 
> 
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