[time-nuts] Measuring startup chirp

[Bruce Griffiths]

Murray Greenman wrote:
> Perhaps I should mention that we are trying to qualify a new oscillator
> chip which we have designed. The foundry we used is a specialist at
> oscillator design and testing, and they have reported noticing the chirp
> in their test facility. Their test system is general purpose and so has
> different conditions to the finished product.
>
> Hence we need to check their measurements on the finished product, which
> is a small ceramic TCXO, where we have bonded-out die and the correct
> crystals. There are no capacitors, except for the compensation system
> provided on the silicon. To make matters worse, we have to look at this
> problem throughout the operating temperature range, -40 to +85 deg C.
>
> Since we are intending to supply these parts to existing customers, it's
> not practical to suggest to them that they do anything different to what
> they did with previous compatible products. It is likely we don't have a
> problem in practice, but without measuring, we won't know. Indeed, do we
> have a chirp start problem with existing products?
>
> Essentially we've discovered a hole in our measurement capability, and
> it's enmbarrassing that the foundry can measure the problem (we believe
> they use a fancy Agilent Phase Noise system and post process the data)
> and we can't!
>
> 73,
> Murray Greenman ZL1BPU
>   
Murray

What is the oscillator output waveform is it:

1) a sinewave , if so what amplitude and what load impedance?

OR

2) a logic level squarewave, if so what are the 1 level, the logic 0 
level, the load impedance, the fall time and the risetime?

The optimum measurement system will differ for sinewave and squarewave 
outputs,

Unless you've had a major breakthrough, or use a narrow bandpass filter 
on the output subpicosecond cycle to cycle zero crossing jitter is unlikely.
Consequently an ADC with 100fs or less sampling jitter should be more 
than adequate to characterise the startup transient.

Bruce