[time-nuts] What is the best counter for a Time Nuts?
Bruce Griffiths
bruce.griffiths at xtra.co.nz
Sat Oct 11 21:53:50 UTC 2008
Mike Monett wrote:
> The Allen deviation is used to describe the performance of a stable
> clock. Measuring the performance of a good clock requires a counter
> with resolution down to picosecond levels. As Dr Griffith points
> out, some modern counters may have internal signal processing that
> makes them unsuitable for this task.
>
> Another thread discussed using a mixer to generate the difference
> frequency between two oscillators, then measuring the stability of
> the resulting beat note:
>
> http://www.febo.com/pipermail/time-nuts/2005-July/019006.html
>
> The basic principle is sound. If the oscillators were running at
> 10MHz, and the frequency difference was 1 Hz, then the beat note
> would be 1 Hz.
>
> This represents one part in 10 million, or 1e-7 of the original
> frequency. If the beat note is measured with 1 microsecond
> resolution, the overall resolution is 1e-7 / 1e-6 = 1e-13. This is
> beyond the capability of most commercial counters.
>
> The difficulty with this approach is the output of a mixer is at a
> fairly low level, perhaps 50 millivolts or so. The frequency would
> also be very low, perhaps 1 Hz. This means the counter would have to
> trigger accurately on a very slow-rising, low amplitude signal.
>
>
Not true, if both the RF and IF ports are saturated as usually
recommended for phase detector operation, the output can be as high as
2V pp (e.g. Minicircuits RPD-1).
The solution to the triggering problem with low slew rate input signals
is simple, build a slope amplifier.
A slope amplifier (in optimised form) consists of a set of cascaded
limiting amplifiers with gradually increasing gain and bandwidth.
Oliver Collins showed how to optimise the gain and bandwidth
distribution to minimise the output noise.
I have since generalised his results to include the case where the input
(self) noise for all amplifiers are not identical.
For further details/references see:
http://www.ko4bb.com/~bruce/ZeroCrossingDetectors.html
<http://www.ko4bb.com/%7Ebruce/ZeroCrossingDetectors.html>
I have some spreadsheets for calculating the amplifier parameters both
for the the restricted and general cases.
> This is a very difficult measurement problem. The accuracy will be
> degraded by noise, such as the 60Hz AC line frequency and its
> harmonics, switching noise from the pc power supplies and monitors,
> radiation from nearby fluorescent lighting, plus thermal noise from
> the mixer and input stage of the amplifiers.
>
> This low-level noise is very difficult to eliminate, especially when
> coax cables are needed to transfer the desired signal from one place
> to another. The result is the measurement system is not as good as
> it could be.
>
Not if you use the built in mixer RF transformers to eliminate low
frequency ground lops at the mixer input and use optical isolation for
the output of the zero crossing detector comparator.
In other words a PCB using surface or through hole mount mixers is far
better than using a packaged mixer with a common low frequency ground
for all inputs and outputs.
It also pays to use a capacitive IF port termination for low beat
frequencies (<100kHz) as this reduces the noise significantly.
> There is a solution to this problem. Another kind of mixer called a
> "digital mixer" is ideally suited for this application. It uses a
> d-flop, with one signal going to the clock pin, and one going to the
> "D" input. The resulting signal on the "Q' output is the frequency
> difference between the two signals.
>
And this isnt affected by low frequency ground loops?
> The output signal is a full logic level swing, perhaps 5 Volts, with
> a risetime of a couple of nanoseconds. This is an ideal signal to
> pass on a terminated coax cable to the counter. The schematic and
> waveforms are shown in the attached GIF.
>
> The output of the first d-flop is passed to a second d-flop to
> eliminate glitches due to metastability in the first stage. This can
> occur when the signal on the "D" input is exactly on the switching
> threshold when the clock transition occurs. The resulting glitch can
> severely disrupt the following logic stages.
>
> In practice, it might be difficult to offset two stable oscillators
> by 1 Hz. In this case, the frequencies can be multiplied to some
> higher value. For example, the frequencies could be multiplied by a
> factor of 10 to 100MHz, and offset by 1 Hz.
>
> There may be some jitter in the leading edge of the beat note since
> the d-flop may or may not catch the transition as it crosses the
> threshold on the "D" input. Instead of the standard +/- 1 clock
> ambiguity in digital circuits, the output could be several clocks
> late. However, if the counter had a resolution of 100 nanoseconds
> (10MHz clock), the extra delay is much less than the counter
> resolution and should have no effect.
>
> The overall resolution in this example would be 1e-8 / 1e-7 = 1e-15.
>
>
What about the noise?
With a gate array is typically around 4E-11/tau.
The noise with dual flipflops may be a little lower but not stellar.
> This is achieved in one second, which is an impossible task for a
> counter. This means the Allen deviation can be measured much faster
> than before, and with much higher accuracy.
>
> A simple LTspice analysis is included in the attached ZIP.
>
> Best Regards,
>
> Mike Monett
>
>
Mike
You've obviously never tried this, in practice its noise is a lot higher
than you think, perhaps 2 orders of magnitude worse than a a double
balanced mixer.
You need to breadboard this and do some tests.
Bruce
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