[time-nuts] Updated Divider Jitter Results - 74HC390

[John Miles]

> > I believe having STD in parts of 10-14th is fairly respectable for
> > amateur designs..

It depends on whether it's due to the counter or the DUT.  Keep in mind the
5370's own jitter is about 15-20 ps for a best-case unit (and they all seem
to be a bit different).

For an application like an ADC sampling clock, SNR is
20*log(1/(2*pi*freq*jitter)).  In this case the jitter floor is around 10
ps, and you would like to think the device itself is cleaner.  Using that
equation, 10 ps of jitter at 10 MHz puts the SNR at about 64 dB.

That's about the same SNR floor that you'd see if you used a traditional
microwave spectrum analyzer to observe the integrated noise on the same 10
MHz source.  You would never try to use a conventional SA to measure phase
noise on a 10 MHz source, unless you knew from the outset that you had a
really, seriously awful 10 MHz source.  Likewise, you can't use a
conventional time-interval counter to characterize the jitter in the time
domain.  You need a specialized test set, either a very clean
direct-sampling ADC/FFT or another type of baseband PN analyzer.

> >> For a 10,000 sample run, the standard deviation was 12.1 picoseconds,
> >> and the peak-to-peak variation was 70 picoseconds.  Based on
> experiments
> >> I ran a few years ago, I think this is pretty much the noise floor of
> >> the 5370B and the divider could be better than this.

Exactly.  The divider had better be *much* better than that, or it is not
useful for a large number of applications.

The TSC5120 can do residual noise measurements, right...?  That's the better
tool for the job.

-- john, KE5FX