[time-nuts] OT: 10 MHz data capture, help

J.D. Bakker jdb at lartmaker.nl
Fri Apr 10 22:23:04 UTC 2009


>I have a old data device that is spitting out TTL data at 10 MHz.
>There's just a data line (no clock) but the edges clearly indicate
>an internal 10 MHz clock.
>
>I'd like to do a continuous capture of the bits, for up to tens of
>minutes, into a PC. That comes to about 1 GB of raw data. I can
>handle the decoding of the bits in software after the capture is
>done. This is a one-time experiment.

Assuming this is a single data line, that's over 1MB per second, more 
than a traditional parallel port can easily handle. There are no 
cheap ubiquitous means to get that amount of data into a PC. The 
methods that I know of are expensive, either in money or engineering 
effort, including:

- Get a digital I/O card. There are few of these around which can 
support your required data rate. One that I used in the distant past 
is the ADLink PCI-7200; I suspect NI may have a few offerings. You 
may have to DIY a shift register to get the data from serial to 
parallel.

- Get a fast analog I/O card, record the data (now several GB worth) 
and apply some DSP to recover the digital data. This looks like a 
roundabout way, but analog I/O cards are more common and thus easier 
to borrow for an afternoon. Again NI has a few, but something like 
the HPSDR Mercury (http://www.hpsdr.org/) might work too; I'm not 
sure if the Mercury FPGA code can do 'wide' baseband sampling yet. A 
variant of this scheme would include a shift register and a simple 
D/A converter to get the rate down.

- Build a board that converts the data stream to Ethernet or USB. I 
know of no COTS solutions for this, although I suspect the HPSDR Ozy 
FPGA can be re-coded to handle this.

- Build a standalone data recorder, either with a microcontroller or CPLD/FPGA.

JDB.
[currently working on the standalone data recorder for a data capture 
application]
-- 
LART. 250 MIPS under one Watt. Free hardware design files.
http://www.lartmaker.nl/




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