[time-nuts] PLL question

Magnus Danielson magnus at rubidium.dyndns.org
Mon Aug 10 13:07:41 UTC 2009


>
>> Date: Fri, 07 Aug 2009 18:35:12 +0200
>> From: Magnus Danielson <magnus at rubidium.dyndns.org>
>>
>>~
>> If possible, keep the comparator frequency fairly high and avoid
>> charge-pump detectors (according to my experience with cheaper-tronic
>> onces where dead-band created low rate wanderings while simple designs
>> excelled in stability).
>>
>> Using a low phase-noise oscillator for cleanup is a wise idea, even if
>> no frequency multiplication occurs. Active loop PI-regulation of
>> sufficient bandwidth suppresses most of frequency trackings of the
>> oscillator, so long-term stability is less of an issue where as
>> phase-noise plots are.
>>
>> Cheers,
>> Magnus
>
> Hi Magnus,
> playing with my prototype (using a 74AC86 XOR) showed that the lock-up
> time varied from 30sec to almost 5min.

Depending on details, aiding may be needed. Aiding may come in form of
wider bandwidth (smaller resistor to charge the capacitor in the loop), a
current source that sweeps but is weak enought for the locking loop to
discard it or by using a frequency/phase detector. S/R detector (modified
so that it does not have any invalid input combinations, takes 4 NAND
gates to do it) usually do the trick.

> Because of this variation, I decided to use a 74HC7046 because of it's
> 'lock detect'. I must admit, the tri-state PC
> did look good too until you pointed out the dead zone. I had assumed this
> would be insignificant, but of course it can't be.
> I'll still try the 74HC7046, but use the XOR PC instead.

The 7046 or 9046 does not have the dead band, or at least claim not to
have it. The 4046s does and should be avoided.

However, the PFD detector may still be usefull if combined with a
classical XOR to overcome deadband problems.

XOR locks isn't my favorite, but for some simple designs it may still work
sufficiently well. Lock-time is as you noted an issue. I prefer more
"steered" lock-in. Also, active loops helps, as they allow better balance
between lock-in properties and loop bandwidth than passive loops allow.

Cheers,
Magnus





More information about the Time-nuts_lists.febo.com mailing list