[time-nuts] Best way for generating 8994.03 MHz from 2899.00042272.....MHz?

Magnus Danielson magnus at rubidium.dyndns.org
Sun Aug 16 17:19:08 UTC 2009


Javier Serrano wrote:
> Hi Hal,
> 
> I guess you are right. A DDS where I place a sine table spanning
> 2^20=1048576 locations will allow me to generate fout=fin*(step/2^20) but if
> I choose to use only 1000000 locations I can generate 1 kHz from 10 MHz
> exactly. Therefore this system would not need feedback. I have not looked at
> the details of how the DDS chips can be controlled, but there must be a way
> to tell them not to use the full RAM. So I guess then it boils down to a
> comparison between this DDS plus mixer based solution against Rick's
> solution (which IMO answers your question on how one builds a PLL at those
> frequencies).
> Concerning your other questions:
> - Yes, exact means we can't round off the numbers.
> - Concerning precision, I think his 0.01 degree spec must apply to an RMS
> deviation measurement during a certain time (maybe the whole year run, or
> just some other unit of time meaningful to operators) between the real
> 8994.03 MHz driving the beam (obviously not accessible to him) and his
> synthesized one. He will notice if things are wrong but looking at his beam
> measurements (made using his synthesized 8994.03 MHz).
> - I don't think he has access to any other clocks aside from the ones he
> mentions.
> 
> So DDS vs. a good VCO. Any thoughts?

Most off the shelf DDS chips is for power-of-two only.

If you want any other modulus, you have to roll it yourself... i.e. FPGA.

Rich's proposal is very sound and similar to what I would consider. I 
just haven't toyed with DROs but should get my wet feet some day... also 
true for chip oscillators in that range.

Cheers,
Magnus




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