[time-nuts] Buffer / distribution amplifier for TCXO

[Bob Camp]

Hi

I suspect you will find that the phase noise floor of the distribution 
system does indeed matter.

Likely the "easy way" to go:

Square the TCXO up with a biased CMOS inverter (at least as fast as a 
74AC04). Run a seperate inverter to drive each of the receivers. A hex 
inverter chip would do it all quite nicely. There should be plenty of 
isolation and far more signal than is needed. Attenuating it at the receiver 
with a pair of resistors should get all the levels to match up. If you want 
to get fancy, transformer couple into each receiver after attenuating.

Bob

--------------------------------------------------
From: "Henry Hallam" <henry at pericynthion.org>
Sent: Wednesday, August 04, 2010 1:46 PM
To: "Discussion of precise time and frequency measurement" 
<time-nuts at febo.com>
Subject: [time-nuts] Buffer / distribution amplifier for TCXO

> Dear time nuts,
>
> Background:
> I have built a GPS receiver based around the SE4120L front end IC [1].
> I used a KT3225 TCXO [2] at 16.3676MHz driving the front end through
> a 10nF series capacitor as in the example circuit in [1].  Inside the
> front end, this oscillator is multiplied up to form a local oscillator
> at 1571.2896 MHz.  The 16.3676MHz signal is also divided to form a
> 4.0919MHz sampling clock.  Digital I and Q samples then go to a DSP
> where the GPS signal processing is done in software.  My receiver
> works nicely, getting it online was a boatload of fun and I'm hoping
> to make it available soon along with open-source software as a GPS
> experimenter's kit.
>
> Problem:
> I'd like to clock multiple receivers from a single 16.3676MHz
> oscillator, in order to combine measurements from multiple antennas.
> The clocks must be at the same frequency, i.e. from the same source,
> but it is not necessary that they have any particular phase
> relationship as phase offsets are removed in the navigation
> processing.
>
> What sort of distribution amplifier should I use to split the output
> of one TCXO into four front ends?  Do I need some kind of impedance
> matching network?  How would I go about designing that?  This sort of
> analog/RF design is unfamiliar territory for me, though I'd like to
> learn.
>
> The TCXO advertises a minimum output level of 0.8Vpp into (10kohm in
> parallel with 10pF).  The front end requires a minimum oscillator
> drive level of 0.2Vpp.  The front end datasheet lists "recommended
> crystal parameters" including a load capacitance of 10pF (typ),
> although I don't know whether or not that refers to the front end
> input capacitance.
>
> My guess is that phase noise performance is not particularly crucial,
> at least by time-nuts standards.  I guess it would be nice if the
> amplifier didn't make the phase noise "significantly" worse than it
> already is from the cheap TCXO.
>
> Many thanks,
> Henry Hallam
>
> [1] 
> http://www.sige.com/support/download-form.html?dl=DST-00059_SE4120L_Datasheet_Rev_3p5_CYW_May-26-2009.pdf
> [2] http://global.kyocera.com/prdct/electro/pdf/tcxo/172_e.pdf
>
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