[time-nuts] Frequency counter recommendation

Richard H McCorkle mccorkle at ptialaska.net
Mon Dec 20 01:18:01 UTC 2010


Ho Ho Ho,

Tis the season once again for giving and I wrote this up to give some
suggestions to the discussion. The PICTIC II was a spin-off of a GPSDO
front end designed specifically for low cost, low parts count, amateur
construction, and 1ns resolution to equal the performance of a modern
GPS receiver. It was intended for long term monitoring of a frequency
standard against GPS to free up your commercial counter for other uses.
I made the design and code public to educate others in the basics of
interpolating counter design with the hope that they would become
inspired to improve the design further. There is a case of diminishing
returns trying to achieve higher TIC resolution using faster clock
rates. A 1 GHz timebase only provides 1ns resolution, so some form of
interpolation is generally required for TIC resolutions better than
1ns.
  The current discussion on counter requirements is very educational
as I went through a similar process before adapting the GPSDO front
end to a stand-alone project. Most users have a 10 MHz source available
so this was selected as the default timebase. When it was developed the
AC CMOS family was chosen as the successor to the HC family with the
idea that later devices would become available with similar pin-outs,
but within a year of its design the AC175 became unobtanium in a DIP
package illustrating the obsolescence problem. The PIC solution may
not be well liked by many members here but versions of the PIC should
be available for many years to come and the assembly code can easily
be ported to later devices as the older ones become obsolete. With an
external prescaler reducing the clock into the PIC to a rate below
16.6 MHz all the other counter functions can be implemented within
the PIC for as many digits as required. The PIC includes a serial
UART that can be converted to RS422 or RS-232 to feed a USB dongle
or LAN adapter, and the PIC TX/RX lines can be optically coupled to
feed the interface device as required.
  The PICTIC II was modeled after the SR620 counter but simplified
to meet the less stringent 1ns requirement for GPS monitoring and to
reduce the size and cost. The principles of the PICTIC design can be
applied to a higher resolution counter with the major issues being
switching speed, noise, and the interpolator used. Testing has shown
the original PICTIC, the PICTIC II, and the PICTIC+ (12-bit ADC)
versions all provide roughly the same 650ps resolution regardless
of the timebase rate used. This implies the actual resolution is
primarily limited by the switching speed of the AC series CMOS logic
used in the front-end and the noise produced. The AC74 D-F/F has
propagation delays in the 3.5 to 10ns range so achieving 1ns TIC
resolution using AC series logic is pushing its limit.
  If 100ps TIC resolution is desired the front-end logic and prescaler
can be changed to ECL, a faster timebase can be used, and an ACAM
TDC-GPX can be used for the interpolator. Going to ECL requires split
supplies increasing the cost, but if we are talking a target cost of
$750 instead of the original $50 target, going to ECL logic with
ECL-TTL converters feeding the PIC, using dual supplies, and adding
a $30 interpolator are no longer issues with the higher target cost.
Once the decision is made to use ECL logic for the prescaler and
front-end you have lower signal levels with balanced clock and data
lines to reduce the noise, and the MC100EL51 D-F/F propagation
delays are in the 385 – 565ps range for 10x or better resolution.
  The Wavecrest DTS-2075 uses a similar front end implemented in ECL
and the patent document http://www.freepatentsonline.com/6226231.pdf
provides sufficient detail to duplicate their interpolators and
front-end for the two channels required. This can get you in the
area of 10ps resolution with the potential of slightly better if
their 14-bit ADC is replaced with a 16-bit ADC. Currently this
seems to be the state of the art in commercial designs so further
improvement beyond this will be a challenge only a dedicated
Time-Nut can appreciate.
  The Wavecrest front end and interpolator could be utilized with
the PICTIC with minor modifications to the code, as the designs are
similar. An external 16-bit ADC like the LTC1865 could be used to
read the interpolators. An ECL prescaler like the MC10H016 would
allow a 200MHz timebase with 12.5 MHz feeding the PIC. An MC100EL05
could be tied to the second synchronizer outputs of both channels
to generate the counter gate. At the end of sample the counter is
stopped, so the low 4 bits of the counter can be read thru an
MC10H601 ECL-TTL converter into the PIC. While these are only
suggestions for a possible system they illustrate what could be
done to increase the resolution of a design similar to the PICTIC.

Happy Holidays

Richard


> That's kinda my point about using rs232. Serial to USB, serial to Ethernet
> adaptors will be available for  a good long while.
>
> Also why I like the idea of a standalone instrument that also has a pc interface of
> some sort.  Or a slot for a pc interface of whatever source I want.
>
> So how does one build the core counter with a start, a stop, and maybe a 10 MHz
> reference input with sub 5ps resolution and accuracy?
>
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