[time-nuts] Burst mode TADD-2 divider modification?

[Bruce Griffiths]

Bruce Griffiths wrote:
> Bruce Griffiths wrote:
>> Bruce Griffiths wrote:
>>> Magnus Danielson wrote:
>>>> Fellow time-nuts,
>>>>
>>>> To support the kind of burst measurements I am playing around with 
>>>> it would be good to be able to generate bursts of transitions 
>>>> rather than even clocks. Depending on the counter it may be simple 
>>>> (say using a HP5372A) or a little more difficult (DTS 2070C).
>>>>
>>>> Creating a burst of 10 kHz transitions for 10 or 100 ms should be 
>>>> possible to do in the PIC code with some hacking.
>>>>
>>>> Similarly creating a burst of 5 or 10 MHz clocks for 1 ms should 
>>>> not be too hard by sniffing the clock after the input shaper and 
>>>> the enable pulse from the PIC.
>>>>
>>>> I thought I would bounce this and see if people have any ideas 
>>>> other than mine... anyone else interest...
>>>>
>>>> Cheers,
>>>> Magnus
>>>>
>>> Since an external gate is required to implement the 5/10MHz clock 
>>> burst it would be simpler to have a selectable pulse width for say 
>>> the PPS output and use this to gate either the 5MHz/10MHz or 10kHz 
>>> as required.
>>>
>>> Bruce
>>>
>> A simple external circuit accomplish this would use an octal gated D 
>> flipflop (74AC377) plus a quad NOR gate (74AC02).
>> For a 100ms burst every second connect 10PPS to the enable input of 
>> the 377, clock the 377 with the 10MHz signal, wire the 377 as a 2 bit 
>> gated shift register with the shift register input connected to PPS 
>> and use the output of the second stage of the shift register to gate 
>> the 10MHz output using the NOR gate (remember to invert the shift 
>> register output first).
>>
>> Bruce
>>
>>
> Correction: make that a 3 input NOR and use the output of both the 
> first and second stages of the 2 bit shift register to gate the clock.
>
> BURST = SR(0)*/SR(1)*/CLK
>
> If one wants a burst of 10kHz pulses, invert the 10KHz signal and use 
> this to clock the 2 bit gated shift register
>
> Bruce
>
>
Oops the 10PPS signal is 50ms wide not 100ns.

Use a 74AHC164 clocked by the 10PPS signal and use a 3 input NOR gate to 
generate a 100s burst of a 10kHz clock as follows:

BURST_CLK = SR(0)*/SR(1)*/10KHZ

Where SR(0) is the output of the first shift register stage and Q(1) is 
the output of the second shift register stage.

The fastidious can use a 74AHC74 or similar to resync the burst clock 
with the 10MHz input signal.

Bruce