[time-nuts] CPLDs for clock dividers

[Magnus Danielson]

Gerhard Hoffmann wrote:
> paul swed wrote:
>> Well not having a lot of luck with the xilinx wise application.
>> Its a 6.5 GB tar and after a good 5 hr plus download the tar doesn't open
>> with zipgenious
>> But 6.5 GB to work a cpld. Seems crazy to me.
>>   
> I also had no luck two weeks ago with the single file download.
> The web install worked ok, however. It downloads many smaller
> files. I think my very slow DSL connection is to blame here.  :-(

The web-installer has the benefit that you can skip larger pieces you do 
not use. That would reduce the download time significantly. Xilinx a bit 
to improve on their installations as well as how apps work. I have had 
to tweak systems in... ehm... interesting ways... and that just to run 
their installation stuff. Last time it worked better, but it's a bit 
hairy still.

> Two years ago, when I still lived in Berlin, Xilinx used to have one of the
> few servers that were capable to max out my (then) 16 MBit/s link.

At the computer club I get a 1 GE pipe if I need it.... not only the 
local link... but into internet too. I don't think they max that one 
out. Too much in-between.

> @ Ulrich:
> Did you see a show stopper with the Xilinx Coolrunners?
> I have used them before and liked them. Really fast and they
> consume close to no power. I'd like to deploy them for something
> jitter-critical very soon.

There should be some interesting choices among the Spartran generations.

But for simple divider-stuff, CPLDs is very nice. I still think that 
trying to do a one-chip solution would be hard to compete with a simple 
external resynchronise DFF. Let the CPLD do the state-updates and the 
DFF do the low-jitter timing. It's a fairly cheap solution anyway.

Cheers,
Magnus