[time-nuts] Advantages & Disadvantages of the TPLL Method

WarrenS warrensjmail-one at yahoo.com
Tue Jun 15 14:15:59 EDT 2010


Bob posted
>The injection lock gain rises at 1/f. At some point it's going to be 
>greater
than the gain through the EFC.

It would seem to me with that argument then nothing works, everything in the 
universal will all be at the same frequency sooner or later.
fortunately
The PLL feedback gain also rises due to the 'PI' integrator at the same 1/f 
rate, and starts out way ahead.
Don't think the injection lock is ever going to catch up, at least not in 
OUR life times.

The offset cause by the effect of Loading is a different subject, and has 
also been taken care of (good enough).

ws

*********************
Hi

The injection lock gain rises at 1/f. At some point it's going to be greater
than the gain through the EFC.

Bob

-----Original Message-----
From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] 
On
Behalf Of WarrenS
Sent: Tuesday, June 15, 2010 1:37 PM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Advantages & Disadvantages of the TPLL Method


Bob posted:
If the two oscillators are locked by injection locking, small changes in the
EFC is no longer needed to keep them in phase / frequency alignment.

No disagreement
I guess the thing you may be missing is that there is so much gain and BW in

the TPLL EFC feedback loop that it complexly overpowers any injection
locking tendency and makes its effect insignificant
This I have tested for in many ways, one way was to increase the cross
coupling between the oscillators by 1000.

If you can not believe that I know how to test for this or add 2 numbers,
I'd suggest you try it for yourself with a TPLL and stop speculating how I'm

wrong.
Injection locking and its friends is not a problem with the simple TPLL
tester using 10811 ref osc, and the 3db & 5 db pads shown in my block
diagram.

ws

********************

Hi

If the two oscillators are locked by input to the EFC then the EFC voltage
will reproduce the phase / frequency of the DUT on the reference (they are
phase locked via the PLL).

If the two oscillators are locked by injection locking, small changes in the
EFC is no longer needed to keep them in phase / frequency alignment. The
injection lock bypasses the pll within the injection lock bandwidth. It's a
second control loop in parallel with the PLL. Since the two oscillators are
already locked (by injection) the EFC "information" is suppressed within the
injection lock bandwidth, but not outside it. It's not a brick wall filter,
the normal stuff applies to exactly how much you have lost on the EFC from
the injection lock.

This is not some sort of math mumbo jumbo. I've physically seen it happen
multiple times on real hardware on the bench in the lab. It happens on
breadboards built from scratch. It happens with HP 3048's. It's a very real
limit when doing any "at output frequency" PLL's.

Bob

-----Original Message-----
From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com]
On
Behalf Of WarrenS
Sent: Tuesday, June 15, 2010 10:04 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Advantages & Disadvantages of the TPLL Method

Bob posted

>Since it's dependent both on frequency offset and phase angle,
When there is no freq offset as in the wsTPLL and no changing of phase
angle,
I'm saying that injection locking no longer applies.
The thing that some may be missing is that the DUT Osc is cloned by the
reference Osc.
There is no significant difference between them. (within the PLL bandwidth
which is >> than tau0)
An oscillator is not going to injection to its self (as far as I know)
NOW, Frequency offset due to loading effects, that is another issue and a
possible problem, so I'm surprised it has not yet been brought up.

> I've seen an unfortunately large amount of data where injection locking
> was the issue.
No argument, me too. That is why the lack of injection locking problems with

the wsTPLL goes high on the advantage side.

>checking for it can be tricky. There are a number of ways of checking for
>it,
No argument, and I do know how to test for it, I also know how to do
integrate and I know how to add 2 + 2.
What I do not know how to do is to get a simple, basic, obvious point
across.


ws

**************
[time-nuts] Advantages & Disadvantages of the TPLL Method
Bob Camp lists at rtty.us
Tue Jun 15 11:48:10 UTC 2010

Hi

With any phase lock system injection locking can indeed be a problem. Since
it's dependent both on frequency offset and phase angle, checking for it can

be tricky. I've seen an unfortunately large amount of data where injection
locking was the issue. There are a number of ways of checking for it, each
with their own issues (and hardware requirements).

Bob
*************
On Jun 15, 2010, at 1:39 AM, Bruce Griffiths wrote:

> WarrenS wrote:
>> Bruce posted
>>> "If and only if injection locking isn't significant."
>>
>> No problem then, because it is not significant.
> For each and every oscillator pair someone may try?????
>> Can place this one under the 'ADVANTAGE' side.
>>
> That's descending into the murky realms of pseudoscience.
> At best you've only shown this to be true for the particular oscillator
> pair being compared.
> Not only must the effect of injection locking be insignificant for the
> reference, it has to be insignificant for the test oscillator as well.
> If injection locking is an issue the efc gain with the loop open will
> differ from the efc gain with the loop closed.
>
>> I have tested this thoroughly in many ways.
>> I do understand the concerns and doubts, especially with an unbuffered HP

>> 10811 as the reference.
>> The 10811s are pretty sensitive to injection locking and "phase pulling".
>> Unlike most other methods, one of the many unique properties that the
>> TPLL method has is that injection locking is normally not a problem with
>> it.
> It will change the loop parameters in particular the efc gain.
> Its just a matter of how much it affects the efc gain.
>> I find it is generally unnecessary to buffer either the Ref Osc or the
>> DUT.
>> This is one of the many features that helps make the simple TPLL so
>> simple.
>> (also it does not hurt or change anything to add a proper buffer)
>> The lack of injection locking is one of the advantages that contributes
>> to its exceptional and unbelievable performance.
>>
> But Adler's equation indicates that an oscillator is much more to
> susceptible to injection effects when the injected signal frequency is
> very close to the oscillator frequency.
>
>> I did not leave the buffers out of the simple TPLL BB that was tested
>> because of my lack of knowledge, but because of my "extra" knowledge on
>> the subject that showed that they were unnecessary.
>> More than once, I have tried to explain the reason why injection locking
>> is not a problem with my version of the TPLL method, but until one proves

>> it for their self, more words from me will not help.
>> I do understand the skepticism and doubt, and I know why it is so hard to

>> believe this for those that have not worked with is this type of method
>> before.
>> I guess someone should write one of those fancy math papers, if it has
>> not already been done, that explains it in more convincing terms than
>> I've been able to.
>> It is hard for me to believe that paper has not already been written, But

>> then it is hard for me to believe that the TPLL is not used more often.
>> There are plenty of places that one of the TPLL methods well give the
>> best overall solution.
>>
>> ws
>>
>> ***************************
>>
> Bruce
>> [time-nuts] Advantages & Disadvantages of the TPLL Method
>> Bruce Griffiths bruce.griffiths at xtra.co.nz
>>
>> WarrenS wrote:
>>> Long explanations, cause I try to explain, the best I can, when I say
>>> something is "WRONG or misleading"
>>>
>>> Magnus Posted:
>>>> EFC linearity will remain an issue for analog oscillators.
>>>> The oscillator gain will differ depending on offset voltage and
>>>> temperature.
>>>
>>> TRUE it is an issue, but somewhat misleading because it need NOT be a
>>> problem or limitation (mostly)
>>> EFC Linearity can be an issue because the TPLL is limited by the
>>> "performance" of the reference oscillator in lots of ways.
>>> BUT
>>> Oscillator EFC gain or linearity are not likely to be of much concern
>>> or a limitation for high end performance.
>>>
>>> The gain nonlinearity I've measured can vary two to one over the full
>>> range of a good Oscillator but it is more like 10% over the normally
>>> used range, if one stays well away from the end points.
>>> NOT so good but livable if you are not making something real accurate.
>>> BUT
>>> For all my accurate stuff, when using a HP 10811, I limit the
>>> full-scale change to 1e-9 or 1e-8 at most.
>>> This uses such a small part of the total EFC range, that the
>>> nonlinearity effects are generally below the noise level and of little
>>> concern at all.
>>>
>>> The fact that Oscillator gain does differ with the EFC voltage (offset
>>> voltage), means if you want to get max accuracy out of the TPLL, it
>>> will need to be calibrated at the EFC offset voltage it is being used
>>> at.  One simple solution, if the OSC also has a independent manual
>>> Freq adjustment like the single oven 10811, is to use it always set
>>> the EFC voltage to be near zero volts.
>>> BTW calibration need not be much of a problem, because it can be a
>>> static calibration.
>> If and only if injection locking isn't significant.
>> This needs to be established for each setup.
>> The simplest way to take the effects of injection locking into account
>> is to measure the effective EFC "gain" with the loop closed.
>>
>>
>>> What I use for a finial calibration & check is the 2G turn over, which
>>> I measure very accurately by other means before hand and then use that
>>> as a known freq offset to check operation and calibration. Of course
>>> there are any number of other ways.
>>>
>>> As far as temperature having ANY effect on EFC gain, that is a total
>>> NON issue.
>>> If temperature had any effect on EFC Gain then Temperature would also
>>> effect Osc Frequency at a fixed EFC voltage,
>>> which would then effect the OSC freq drift and stability,
>>> that would then effect anything that the Osc was used for, NOT just
>>> the TPLL.
>>> The TPLL actually has a slight advantage over other methods,
>>> because the PLL will adjust the freq to be correct, even if the EFC
>>> effect should change.
>>>
>>>
>>>
>>>>> I think it is reasonable to assume that a TPLL weighs in at about
>>>>> 200 USD with all support mixers, amplifiers, ADCs etc.  if you don't
>>>>> have the parts
>>>> It is still a fairly cheap solution.
>>>
>>> Yes I think that is ONE reasonable number to use and a fair conclusion.
>>> BUT there are others.
>>> The EBAY cost of the TPLL can be easy under $10, not including the
>>> reference Osc and the ADC.
>>>
>>> Do note, NONE of items above are plural, Only one is needed per system
>>> unlike some other methods.
>>> Because the cost of the Ref Osc is so variable and depends so much on
>>> what one is doing, I have noticed that its cost is generally not
>>> included in the base price. I think even on the $20K+  TSC 5120A that
>>> the reference Osc is an extra cost option.
>>>
>>> The ADC is another BIG variable, depending on your needs and skill
>>> level and junk box, almost no limit in cost at the high end,
>>> and can be as low as $0.00 dollars if you are a student doing a
>>> science project.
>>> It can also be as low as $1.00 if one is good at programming PICS or
>>> other micros with built in ADC's.
>>>
>>> The only other major part in the TPLL with any cost over $1 is the
>>> Phase detector.
>>> The one I use most is a micro-circuits $15 single price device, but
>>> I've used all sorts of dual balanced mixers,
>>> and if one is real cheap and good at design, I have found that a PD
>>> based on a 50 cent XOR gate works fine.
>>>
>>> ws
>>>
>>> *****************************
>> 




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