[time-nuts] Advantages & Disadvantages of the TPLL Method
WarrenS
warrensjmail-one at yahoo.com
Sun Jun 20 17:47:16 UTC 2010
Bob II
Short summery for the Berry readers:
The simple TPLL BB works fine and is better than any OXCO that it has been
used with.
The fact that some so called experts do not believe or understand why, does
not change that proven fact.
*****
and the longer story for those that have nothing better to do all day long.
For others that have been around for a while and have endured reading the
silly exchanges here,
I do apologize for yet another round of the same NS.
But it would seem that some have missed a few important points about this
subject.
I do not apologize for the fact that I can not &/or will not explain every
detail of the simple TPLL BB that I've built in a way that satisfies all.
but
What has been done is that a version of the simple TPLL has been tested by a
respected and independent person and instrument.
The fact that NO one is questioning the results of those test, puts this in
a MAJOR different category than someone's wild unproven theory.
For those test see < http://www.thegleam.com/ke5fx/tpll.htm >
Here are the clams for the TPLL that was tested:
1) Its answers match the TSC5120A over a wide range of Oscillators and a
wide range of Taus
2) Its performance (the way I have set it up) is limited by the reference
Oscillator (in many ways).
3) It cost me under $10.00 (using ebay and my parts bin.)
4) It has one active powered part. (Plus the Ref osc, the DUT, the DataQ
ADC, the PS and the PC).
5) It needs no special Software, It can do it's thing with off the shelf ADC
data logging S/W plus Ulrich's great Plotter program.
6) A lot of people including some of the so called nut experts do not fully
understand how it works.
7) A quick look at the above test data and the results of the swinging Osc
test show that this method gives useful resolution down in the near single
digit femtosecond range.
The fact I do not care what others think or know or understand, does not
change the fact that it works.
If you or others want to understand more about how and why a TPLL works, you
can read the fancy papers,
(which BTW most that have been sited as proof that it does not work, do not
even apply to this method) or you can do what I did.
Build you own and test it and improve it until you do fully understand how
it works.
The basic block takes just three parts to make something that works. A EFC
Ref osc, a Phase Detector and an Amp.
It does not take rocket science or a degree to connect up three parts.
I started with JUST those three parts with my first one and it worked OK.
It is also a great project to provide a lot of self training.
And consider this, as far as I can tell, the simple TPLL is still so rare,
you may be only the second person that has a working unit.
There appears to be more people that have walked on the moon than that are
still alive and have seen a TPLL work with this kind of performance.
It has been a great leaning experience for me.
One of the things I have learned, is that some of the so called experts out
there do not understand some very simple and basic things when it comes to
how and why the simple TPLL works so well or at all.
Unfortunately, one of the things I did NOT learn or get any better at is how
to convince the skeptics.
Some think I'm wrong in this believe, but I do not feel that I need to be
blamed for what others do not understand nor do I feel it is my duty to try
and educate them in what I consider basic, simple things, like why
oversampling does integration or why one would needs femtosecond type
performance to get the results that the TPLL has shown to give. I'm sorry
for your and others shortcomings, but it is not my problem nor is it my
goal to fix that.
I have my own problems and shortcoming that are a higher priority to me.
Also I have a low tolerance level and little patience for those that can not
see or understand the obvious.
Bob Posted:
> All I have heard throughout this thread is a lot of bashing of those
> asking the questions.
I can not answer for, or control others but I do think if you check back,
the only bashing and name calling I have done is when someone says it is not
working or that it does not integrate, or it can not be doing fs type stuff
or it must be all luck, or it needs a such and such type ADC or it should
only be done like the 50 year old version or ON and ON with all the other
really ridiculous and obvious untrue things I have been told.
True, my responses could of been far better.
All I should of said, and my new approach, is to say "look at the data, It
shows that it works".
If you still think otherwise, then it may just be others and not me that
does not fully understand how this works.
I'm not going to let others problems be MY problem nor is it my
responsibility to try and fix or try and teach them.
If you think I can teach you how or why this works as good as it does, then
you are greatly overestimating my abilities.
But
If you think I do not understand how and why the simple TPLL works, then you
are Greatly underestimating my abilities.
(It's not Luck that it works as good as it does)
and concerning your latest question,
The answers is yes, a noise floor resolution of 1e-12 at 100Hz does mean it
must have useful resolution down to at least 10 fs, 1e-14 seconds
and no I'm not going to explain why that is so either.
ws
*******************
******************
[time-nuts] Advantages & Disadvantages of the TPLL Method
Robert Benward rbenward at verizon.net
Sun Jun 20 14:46:09 UTC 2010
Steve,
I am a professional engineer, but in this arena I am an amateur. That is
why I'm asking the questions, not to put down, but to understand some of the
claims made. And as I said in one of my previous emails, I've seen amateurs
run circles around the professionals, and those professional admitting utter
astonishment at those amateur accomplishments (this is in the area of
amateur astrophotography).
What I have heard throughout this thread is a lot of bashing of those asking
the questions, surfacing as derogatory and berating comments on other's
understanding. I have also heard much claims to a certain procedure without
one iota of numerical mumbo-jumbo to back it up.
The issue here is an inability to describe a simple claim. Pete has
attempted to put things in simple numbers, and I see where he is going, and
I concur with some of his calculations. If one can not describe what
appears to be a simple procedure, then I must question the basic
understanding behind the explanation. If you make a wild claim, and then
you can't even get the bullet on the paper, then I must question the
shooter's understanding.
I guess I am not comfortable with the use of femtoseconds to describe
frequency accuracy. Technically, a locked PLL is at the exact frequency as
the reference, as measured in the long term. The phase between the two may
not be at zero, that depends on the type of phase detector and the DC
offsets in the system. On the short term, phase noise of the reference will
cause the loop to generate error terms which will change the phase of the
DUT. Oscillators are also specified using phase noise, e.g. 135dB down @
100Hz. That specifies how much energy is not in the bandwidth of the
carrier. It also implies the phase is constantly changing! If the phase is
changing, the error term is changing, and so forth and so on.....Your
measurement can only be as good as your reference oscillator. A DVM can
only average this error, it can't give you the instantaneous value of the
peak deviation of the error signal, which is what you would need to claim fs
cycle to cycle timing. Fs units are appropriate for cycle to cycle
variation, not long term or multicycle assements. Even the best HP DVM is
only good to 3ppm on the 100mV scale and the shortest reading is 167us.
That's 10 orders of magnitude greater that the deviation you are trying to
measure. If you average the mixer output, you can no longer claim fs
timing. What you can claim is a long term frequency stability in ppm.
This is my simple understanding of phase detectors and mixers. You might
get there by dividing down a bunch of numbers but I don't think the method
supports the claim (of fs timing).
Bob
************************
----- Original Message -----
From: Steve Rooke
To: Discussion of precise time and frequency measurement
Sent: Sunday, June 20, 2010 2:00 AM
Subject: Re: [time-nuts] Advantages & Disadvantages of the TPLL Method
Bob,
Can I answer this one.
On 20 June 2010 04:36, Robert Benward <rbenward at verizon.net> wrote:
> Warren,
> I was responding to ke5fx comment "using a 12-bit, 480-Hz serial DAQ in
> place of the voltage-to-frequency converter in the diagram above". A DAQ
> is a multifaceted data acquisition system, where as in your annotated
> diagram you showed an ADC.
The DAQ that Warren is referring to to has a 12bit ADC input capable
of performing up to 480 samples per second.
> I understand it's analog, but you said: "Say you have a nice logic gate
with
> 1 ns delay" . So back to the analog loop, do you have an analysis that
gets
> you from EFC to femtosecond stability? PLLs are notorious for phase
noise,
> the phase noise actually representing the error term that brings the
loop
> back into lock.
I personally think the 1fs issue has become way out of hand and people
are now focussing on that instead of the big picture. Whilst I
understand that the professional engineers on this list wish to pounce
on every t that is not crossed, every i that is not dotted, and
requiring a complete mathematical breakdown of everything, it is not
going to happen here. If those professional engineers would like to
assist with the process of understanding and documenting this idea in
a way that pulls their chain, that would be great, but if it's down to
pointing the finger at the amateur engineers and laughing, then
perhaps they need more education in etiquette. Remember the golden
rule, do unto others as you would wish to be done.
Sure, some of us do not have the correct technical engineering banter,
so when we call the World a sort of round ball shape, please don't
play deaf until we say it's an oblate spheroid. Try to help us
communicate with you, we are trying to describe things in the best way
we can and we have something useful to contribute, IE. just take
Warren's TPLL implementation which seems to be producing good results.
So why don't we try to understand exactly how it is doing this instead
of ripping it apart and saying you shouldn't do it that way, you have
to do it this way. Remember that geezer who invented the lightbulb, he
didn't work it all out mathematically on paper before he chose
tungsten, no he did it experimentally and everyone seems to think
highly of him.
Steve
>
>
> For your second email:
>
>>You are now averaging the "repeatable" jitter? YES
> I was not questioning the procedure, I was questioning the conclusion;
>
>>Are you using a digital phase detector or a mixer as shown? Analog
>>Phase detector
> Why the digital analogy if it's all analog?
>
>>Do you have an analysis of the loop sensitivity/resolution? No
>>analysis, No limit it is analog
> I don't agree with you about the limit, and without an analysis or even
a
> simple calculation, how do arrive at femtosecond lock? if there is no
> limit, why not a hundred times less?
>
>>Why do you say the results are repeatable in the short term vs the long
>>term? Long term includes other factors such as non random drift, not
>>just "random Noise"
> Maybe so, but using the "short term" , is not a license to better jitter
> figures by a factor of 100. Since you are not using digital, I don't
know
> where this example came from or why it is relevant.
>
>> Is there not a lower limit to how much you can average? Depends or
>> everything, but not up to > 1 sec of averaging when the conditions are
>> made right
> I don't understand how you arrive at this conclusion
>
>
> For your last email:
> What attracted me to the TPLL question now was that you comment that you
are
> maintaining a femtosecond lock. Please don't dumb it down for me. I may
not
> understand all the statistical stuff, but I can understand an analysis.
>
>
> Bob
>
>
>
> ----- Original Message -----
> From: "WarrenS" <warrensjmail-one at yahoo.com>
> To: "Discussion of precise time and frequency measurement"
> <time-nuts at febo.com>
> Sent: Saturday, June 19, 2010 3:27 AM
> Subject: Re: [time-nuts] Advantages & Disadvantages of the TPLL Method
>
>
>> Bob
>>
>>>> Don't know if I can explain it to you, I'm not so good at explaining,
>>>> I'll give it *ONE* try.
>>>> Example with some random picked numbers (JUST TO SHOW THE MAIN
POINTS).
>>
>> I tried,
>> All information and test that are available on the TPLL is on JOHN'S
>> KE5FX
>> site or in past postings.
>> http://www.thegleam.com/ke5fx/tpll.htm
>>
>> One other thing I may not of made clear, The analog averaging thing
does
>> not
>> help at low freq like at 1 PPS
>> The TPLL works great because it is at a high freq like 5 or 10 MHz.
>> DAQ == DataQ == ADC
>>
>>> I don't think 10ps is achievable under any dynamic conditions IMHO
>> OK, I don't really care, use whatever number you want, you'll still end
up
>> below the Ref osc noise.
>> but
>> You may be surprised then by what the single shot "Aperture
uncertainty"
>> specs are for the kind of devices that really care about this sort of
>> thing.
>> But then none of that really maters AT ALL,
>> because there is NO Digital anything in the simple TPLL before the ADC
>> where
>> a 10 Hz device would work fine for most.
>> I just gave you an example to try and answer your question on digital
>> logic
>> which was:
>>> How do you do fs when most digital logic has jitter several of orders
of
>>> magnitude greater?
>>
>> ws
>>
>> ***************************
>> [time-nuts] Advantages & Disadvantages of the TPLL Method
>> Robert Benward rbenward at verizon.net
>> Sat Jun 19 03:18:05 UTC 2010
>>
>> Warren,
>> Is there not a lower limit to how much you can average? Yes, it's the
>> sqrt
>> of the number of samples, but doesn't noise,
>> hardware, and other perturbations limit the usefulness of this method?
>>
>>> Then one can get repeatable results say 100 times better from cycle to
>>> cycle in the short term.
>>> so down to 10ps repeatable.
>>
>> Why do you say the results are repeatable in the short term vs the long
>> term? Isn't what you defined above
>> (repeatability) the opposite of jitter? Jitter I thought was cycle to
>> cycle
>> variation in prop delay. On 1ns prop
>> devices, I don't think 50-100ps jitter is unreasonable under the most
>> optimum conditions, the most careful circuit
>> layout, and constant repeatable inputs. I don't think 10ps is
achievable
>> under any dynamic conditions IMHO.
>>
>>> One can average 1,000,000 readings of the 10 ps jitter
>>> If they are truly random, that can give you a 1e-3 improvement (square
>>> root of number of samples averaged)
>>
>> You are now averaging the "repeatable" jitter.
>>
>> KE5FX's website shows a diagram and a link to your diagram as well. Are
>> you
>> using a digital phase detector or a mixer
>> as shown? BTW, KE5FX refers to DAQ as your update to the design, where
I
>> believe he meant an ADC.
>>
>> You have my curiosity peaked. Do you have an analysis of the loop
>> sensitivity/resolution?
>>
>> Bob
>>
>>
>> ----- Original Message -----
>> From: "WarrenS" <warrensjmail-one at yahoo.com>
>> To: "Discussion of precise time and frequency measurement" <time-nuts
at
>> febo.com>
>> Sent: Friday, June 18, 2010 6:49 PM
>> Subject: Re: [time-nuts] Advantages & Disadvantages of the TPLL Method
>>
>>
>>> Bob posted
>>>>can you explain it to me?
>>>
>>> Don't know, I'll give it ONE try.
>>> I'm not so good at explaining, but it is pretty basic if one does not
>>> start assuming that it can not be done at the
>>> start.
>>> It is mostly about averaging lots of those transitions, and the real
>>> trick
>>> is that it is not Digital.
>>> Analog has no lower limits except manly for Johnson noise type effects
>>> (mostly).
>>>
>>> Example with some random picked numbers.
>>> and assuming all analog that has no digital steps in it to limit
>>> resolution or add noise.
>>>
>>> Say you have a nice logic gate with 1 ns delay
>>> If you make it all nice and clean, and repeatable such as constant PS,
>>> rise time etc.
>>> Then one can get repeatable results say 100 times better from cycle to
>>> cycle in the short term.
>>> so down to 10ps repeatable.
>>> Now make things even more clean with no variations and assuming random
>>> noise.
>>> Now if one is doing this at 10 MHz and only cares about the average
over
>>> 0.1 sec (10 Hz)
>>> One can average 1,000,000 readings of the 10 ps jitter
>>> If they are truly random, that can give you a 1e-3 improvement (square
>>> root of number of samples averaged)
>>> so now down to 10 fs of average jitter at 10 Hz for a 10 MHZ gate
>>> starting
>>> with a 1ns initial delay.
>>>
>>> OF course if Anything changes at all, it will drift much more than
that,
>>> which may or may not mater much depending on
>>> what one is doing.
>>> If you only really care about the difference between any two
consecutive
>>> 100 ms reading that are next to each other,
>>> as is (mostly) the case in ADEV, then not a big deal.
>>>
>>> IF it does matter or you want to do better, the next step is to do it
all
>>> differential, so you are looking at only the
>>> different of two separate independent but equal circuits. Differential
>>> can
>>> give, say a 1000 to one or better
>>> improvement in drift due to common things such as temperature etc.
>>>
>>> If that helps explain the basics, good, if not you need to ask others
to
>>> explain it better.
>>>
>>> And yes there all kinds of things that can & do go wrong and many ways
to
>>> screw it up.
>>> so as easy as it sounds, it does take a bit of skill and art to do it.
>>> Especially when one realizes that you are measuring things << 0.001 in
of
>>> distance change will have major effects on
>>> because of the speed of light.
>>> (approx 1ft /ns, 0.01 in/ps, 1 micron/4fs)
>>>
>>>
>>> Now if one starts out, not with a gate but a phase detector that is
made
>>> for such things, and averages enough (but not
>>> to long) and is real careful,
>>> 1fs resolution is possible in the 100 Hz range with 10 MHz
>>>
>>> 10 MHz & 1fs at 100 Hz gives 1e-13 freq variation resolution at tau
10ms
>>> The simple BB TPLL is only getting about a tenth of that, (as shown on
>>> John's test plots) so it can be made much
>>> better with enough care, if anyone has a ref osc that needs it.
>>> But as I am always so quick to point out, the BB tester was not
optimized
>>> for any one thing, It's performance was
>>> selected as a compromise for 'KISS' reasons. (KISS = Keep It Simple so
>>> the experts can understand.)
>>>
>>> please let me know on or off line if I'm wasting my time trying to
>>> explain
>>> this to the non "nut experts" without the
>>> help of the fancy math papers.
>>>
>>> ws
>>>
>>> *********************
>>> [time-nuts] Advantages & Disadvantages of the TPLL Method
>>> Robert Benward rbenward at verizon.net
>>> Fri Jun 18 20:23:40 UTC 2010
>>> Previous message: [time-nuts] Advantages & Disadvantages of the TPLL
>>> Method
>>> Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
>>>
>>> Warren,
>>> I'm a newbie, so can you explain it to me? Femto anything is something
>>> mostly reserved for a well equipped lab. How do you do it when most
>>> digital
>>> logic has jitter several of orders of magnitude greater?
>>>
>>> Bob
>>>
>>> *************************
>>
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