[time-nuts] HP 5328A Divider / Timebase Output performance

Bert, VE2ZAZ ve2zaz at yahoo.ca
Thu Mar 18 13:39:24 UTC 2010


All,

Just to convince myself that my setup is OK, I decided to check my 5370A counter by doing ADEV/MDEV on its own OCXO output, a self-check as recommended in the manual. 50 ohms input on START, HiZ input on STOP, thresholds in preset (~ 0 Volt), common input (internally bridged), rising edge on START, falling edge on STOP. The results are shown in purple. I also measured the HP 8644A OCXO output the same way and got the green plot. No surprise there, more noise because the counter is measuring an external source as opposed to its own timebase.  Based on that, I know that the 5370A counter is not the one generating all that noise on the 5328A divider readings. The one thing I will do just for fun is to measure all the OCXOs I have in-house to see if results will vary a lot. I will try to keep the START-to-STOP interval small using an external delay line on the STOP input instead of bridging inside.

>From all that discussion, and after having tried various settings, I
come up to the conclusion that the HP 5328A counter makes a good
general purpose divider, for example, checking GPS PPS performance. But
I need a much better performing divider for serious low jitter source
measurements.

One thing I notice on my 5370A, I don't get ~50 ns readings when the thresholds are set to PRESET (0.00 on the readout). I get ~45 ns. I can adjust the thresholds to get 50 ns, but I would have expected the readings to be much closer to 50ns, even with a sine wave. Amplitude is 400mV pk-pk. Is this typical of the 5370A, or it needs calibration?

Bert.

ps: I am thankful to Magnus, Bruce, John, Pete and a few others for the hints on ADEV and MDEV measurements. I also got a few emails of people who are, like me, learning a lot from this email exchange.


----- Original Message ----
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To: time-nuts at febo.com
Sent: Wed, March 17, 2010 4:14:51 PM
Subject: time-nuts Digest, Vol 68, Issue 95

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Today's Topics:

   1. Re: HP 5328A Divider / Timebase Output performance
      (SAL CORNACCHIA)
   2. Frequency divider PCB: Current status on "pre-orders",    and
      pointers to documentation. (David C. Partridge)
   3. Re: Frequency divider PCB: Current status on "pre-orders",
      and pointers to documentation. (ernieperes at aol.com)
   4. Re: Frequency divider PCB: Current status on    "pre-orders",
      and pointers to documentation. (Bill Mason)
   5. Re: HP 5328A Divider / Timebase Output performance
      (Magnus Danielson)
   6. Re: HP 5328A Divider / Timebase Output performance
      (Bruce Griffiths)


----------------------------------------------------------------------

Message: 1
Date: Wed, 17 Mar 2010 08:46:27 -0700 (PDT)
From: SAL CORNACCHIA <salccor at rogers.com>
Subject: Re: [time-nuts] HP 5328A Divider / Timebase Output
    performance
To: Discussion of precise time and frequency measurement
    <time-nuts at febo.com>
Message-ID: <322935.78365.qm at web88204.mail.re2.yahoo.com>
Content-Type: text/plain; charset=iso-8859-1

Hi Bert,
Could You tell me?how to?produced the trace for two timebase oscillators.
Thank You
?Best regards,
Sal C. Cornacchia
Electronic RF Microwave Engineer (Ret.) 







________________________________
From: "Bert, VE2ZAZ" <ve2zaz at yahoo.ca>
To: time-nuts at febo.com
Sent: Wed, March 17, 2010 11:01:14 AM
Subject: [time-nuts] HP 5328A Divider / Timebase Output performance

OK, I am doing a 24-hour ADEV analysis of the HP 5328A Timebase Output when set to divide-by-10,000,000. I use the 10MHz output from an HP 8644A sig.gen. OCXO. I split that 10MHz signal into two; one end goes to the the input of the HP 5328A counter. The other 10MHz end goes to the Stop input of the 5370A. The Start input gets the 5328A Timebase Output PPS. The 5370A is free running. I have included the plot of what I get so far. 

I would tend to say that the divider is pretty lousy for short term, but it is all fine for longer runs, right? 

Is this what I should expect from a TTL/ECL divider chain designed in the '70s-'80s? How would this compare to a modern divider chain, like the PIC divider or David Partridge's divider board?

Since I get a straight line pretty much up to 500s or so, do I conclude that the divider dominates the system noise up to there? 

Of course, the 5370A timebase drift has to be taken into account but is not subtracted on that plot.

Thanks,

Bert.



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------------------------------

Message: 2
Date: Wed, 17 Mar 2010 18:28:23 -0000
From: "David C. Partridge" <david.partridge at dsl.pipex.com>
Subject: [time-nuts] Frequency divider PCB: Current status on
    "pre-orders",    and pointers to documentation.
To: <TekScopes at yahoogroups.com>, <TekScopes2 at yahoogroups.com>,
    <hp_agilent_equipment at yahoogroups.com>,
    <TestEquipTrader at yahoogroups.com>,    "'Discussion of precise time and
    frequency measurement'"    <time-nuts at febo.com>
Message-ID: <2EB42B61C3D34C6FAA8EDF823A998D36 at APOLLO>
Content-Type: text/plain;    charset="us-ascii"

The current situation is that I have almost enough statements of intent to
get to the magic 50 which will allow a price of GBP14.50 per board plus
delivery.   For the avoidance of doubt, this is the price for a bare PCB,
not for a kit, and definitely not for a made up board.

I intend to "keep the book open" until 18:00 Zulu (UTC or GMT) on Sunday
21st March, I will then count up what I have and order that many boards (and
maybe a few over to get a nice round number).

I've received numerous reqeusts for the design documentation, schematic, and
a bill of materials

They can all be downloaded from my website, but there's no way (yet) to
navigate to them (a round tuit problem).

Write up:

<http://www.perdrix.co.uk/FrequencyDivider/Frequency%20Divider%202.pdf>

Schematic:

<http://www.perdrix.co.uk/FrequencyDivider/Frequency%20Divider%202%20Schemat
ic.pdf> 

and BOM:

<http://www.perdrix.co.uk/FrequencyDivider/Frequency%20Divider%202%20Bill%20
of%20Materials.pdf>

The schematic and write up have both been updated today, and the BOM is new
today.

For those who worry about SMT soldering, you don't need a reflow oven, it
can all be done with tweezers, a small tipped iron, fine solder wire, and
liquid flux (or a flux pen).  A good pair of strong reading glasses helps
too!   See:

<http://www.curiousinventor.com/guides/Surface_Mount_Soldering/101>

I've also had questions on part pricing:  Back in 2008, the cost to populate
one PCB using a MAX999, thick film resistors, and standard (X7R) chip
capacitors was about GBP28 including Molex headers and SMB sockets.   I
don't expect it to be massively different now.   I'm afraid I don't have
full parts kits, and the necessary up front costs to do so is more than my
finances allow at present.

FWIW, the ADCMP600 is a bit pricier than the MAX999, and is supposed to be
"better", though I'm not sure in what respects it is better.

If you want the lowest possible level of phase noise, you would follow the
bill of materials recommendations and use thin film resistors and C0G
capacitors in the clock shaper part of the circuit at the very least, but
this adds considerably to the cost (for example 100nF C0G 1206 capacitors
are about 1 pound each, while an X7R part is only a few pence).

Regards,
David Partridge




------------------------------

Message: 3
Date: Wed, 17 Mar 2010 14:37:47 -0400
From: ernieperes at aol.com
Subject: Re: [time-nuts] Frequency divider PCB: Current status on
    "pre-orders", and pointers to documentation.
To: david.partridge at perdrix.co.uk, time-nuts at febo.com
Message-ID: <8CC941812E330C6-5FE0-988 at webmail-m014.sysops.aol.com>
Content-Type: text/plain; charset="us-ascii"


Hi David,

please put me on the list, I need 1ea PCB board..

My call is HG5ED.

Best regards,

Ernie.

Ps. hope Paypal is OK?







-----Original Message-----
From: David C. Partridge <david.partridge at dsl.pipex.com>
To: TekScopes at yahoogroups.com; TekScopes2 at yahoogroups.com; hp_agilent_equipment at yahoogroups.com; TestEquipTrader at yahoogroups.com; 'Discussion of precise time and frequency measurement' <time-nuts at febo.com>
Sent: Wed, Mar 17, 2010 7:28 pm
Subject: [time-nuts] Frequency divider PCB: Current status on "pre-orders", and pointers to documentation.


The current situation is that I have almost enough statements of intent to
et to the magic 50 which will allow a price of GBP14.50 per board plus
elivery.   For the avoidance of doubt, this is the price for a bare PCB,
ot for a kit, and definitely not for a made up board.
I intend to "keep the book open" until 18:00 Zulu (UTC or GMT) on Sunday
1st March, I will then count up what I have and order that many boards (and
aybe a few over to get a nice round number).
I've received numerous reqeusts for the design documentation, schematic, and
bill of materials
They can all be downloaded from my website, but there's no way (yet) to
avigate to them (a round tuit problem).
Write up:
<http://www.perdrix.co.uk/FrequencyDivider/Frequency%20Divider%202.pdf>
Schematic:
<http://www.perdrix.co.uk/FrequencyDivider/Frequency%20Divider%202%20Schemat
c.pdf> 
and BOM:
<http://www.perdrix.co.uk/FrequencyDivider/Frequency%20Divider%202%20Bill%20
f%20Materials.pdf>
The schematic and write up have both been updated today, and the BOM is new
oday.
For those who worry about SMT soldering, you don't need a reflow oven, it
an all be done with tweezers, a small tipped iron, fine solder wire, and
iquid flux (or a flux pen).  A good pair of strong reading glasses helps
oo!   See:
<http://www.curiousinventor.com/guides/Surface_Mount_Soldering/101>
I've also had questions on part pricing:  Back in 2008, the cost to populate
ne PCB using a MAX999, thick film resistors, and standard (X7R) chip
apacitors was about GBP28 including Molex headers and SMB sockets.   I
on't expect it to be massively different now.   I'm afraid I don't have
ull parts kits, and the necessary up front costs to do so is more than my
inances allow at present.
FWIW, the ADCMP600 is a bit pricier than the MAX999, and is supposed to be
better", though I'm not sure in what respects it is better.
If you want the lowest possible level of phase noise, you would follow the
ill of materials recommendations and use thin film resistors and C0G
apacitors in the clock shaper part of the circuit at the very least, but
his adds considerably to the cost (for example 100nF C0G 1206 capacitors
re about 1 pound each, while an X7R part is only a few pence).
Regards,
avid Partridge

______________________________________________
ime-nuts mailing list -- time-nuts at febo.com
o unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
nd follow the instructions there.



------------------------------

Message: 4
Date: Wed, 17 Mar 2010 14:41:32 -0500
From: "Bill Mason" <phase3 at wcc.net>
Subject: Re: [time-nuts] Frequency divider PCB: Current status on
    "pre-orders", and pointers to documentation.
To: <david.partridge at perdrix.co.uk>,    "'Discussion of precise time and
    frequency measurement'"    <time-nuts at febo.com>
Message-ID: <73A1EDF9E0364908B9E0F233E4B4EE2A at MaryJo2>
Content-Type: text/plain;    charset="us-ascii"

David:

Please put me on the list for two each of the divider boards plus
documentation, etc....

Thanks:

Bill Mason
W5STP
cntaty at wcc.net
masonlaw at wcc.net

-----Original Message-----
From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On
Behalf Of David C. Partridge
Sent: Wednesday, March 17, 2010 1:28 PM
To: TekScopes at yahoogroups.com; TekScopes2 at yahoogroups.com;
hp_agilent_equipment at yahoogroups.com; TestEquipTrader at yahoogroups.com;
'Discussion of precise time and frequency measurement'
Subject: [time-nuts] Frequency divider PCB: Current status on
"pre-orders",and pointers to documentation.

The current situation is that I have almost enough statements of intent to
get to the magic 50 which will allow a price of GBP14.50 per board plus
delivery.   For the avoidance of doubt, this is the price for a bare PCB,
not for a kit, and definitely not for a made up board.

I intend to "keep the book open" until 18:00 Zulu (UTC or GMT) on Sunday
21st March, I will then count up what I have and order that many boards (and
maybe a few over to get a nice round number).

I've received numerous reqeusts for the design documentation, schematic, and
a bill of materials

They can all be downloaded from my website, but there's no way (yet) to
navigate to them (a round tuit problem).

Write up:

<http://www.perdrix.co.uk/FrequencyDivider/Frequency%20Divider%202.pdf>

Schematic:

<http://www.perdrix.co.uk/FrequencyDivider/Frequency%20Divider%202%20Schemat
ic.pdf> 

and BOM:

<http://www.perdrix.co.uk/FrequencyDivider/Frequency%20Divider%202%20Bill%20
of%20Materials.pdf>

The schematic and write up have both been updated today, and the BOM is new
today.

For those who worry about SMT soldering, you don't need a reflow oven, it
can all be done with tweezers, a small tipped iron, fine solder wire, and
liquid flux (or a flux pen).  A good pair of strong reading glasses helps
too!   See:

<http://www.curiousinventor.com/guides/Surface_Mount_Soldering/101>

I've also had questions on part pricing:  Back in 2008, the cost to populate
one PCB using a MAX999, thick film resistors, and standard (X7R) chip
capacitors was about GBP28 including Molex headers and SMB sockets.   I
don't expect it to be massively different now.   I'm afraid I don't have
full parts kits, and the necessary up front costs to do so is more than my
finances allow at present.

FWIW, the ADCMP600 is a bit pricier than the MAX999, and is supposed to be
"better", though I'm not sure in what respects it is better.

If you want the lowest possible level of phase noise, you would follow the
bill of materials recommendations and use thin film resistors and C0G
capacitors in the clock shaper part of the circuit at the very least, but
this adds considerably to the cost (for example 100nF C0G 1206 capacitors
are about 1 pound each, while an X7R part is only a few pence).

Regards,
David Partridge


_______________________________________________
time-nuts mailing list -- time-nuts at febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.




------------------------------

Message: 5
Date: Wed, 17 Mar 2010 20:53:09 +0100
From: Magnus Danielson <magnus at rubidium.dyndns.org>
Subject: Re: [time-nuts] HP 5328A Divider / Timebase Output
    performance
To: Discussion of precise time and frequency measurement
    <time-nuts at febo.com>
Message-ID: <4BA13325.9050907 at rubidium.dyndns.org>
Content-Type: text/plain; charset=ISO-8859-1; format=flowed

Bert, VE2ZAZ wrote:
> OK, I am doing a 24-hour ADEV analysis of the HP 5328A Timebase Output when set to divide-by-10,000,000. I use the 10MHz output from an HP 8644A sig.gen. OCXO. I split that 10MHz signal into two; one end goes to the the input of the HP 5328A counter. The other 10MHz end goes to the Stop input of the 5370A. The Start input gets the 5328A Timebase Output PPS. The 5370A is free running. I have included the plot of what I get so far. 
> 
> I would tend to say that the divider is pretty lousy for short term, but it is all fine for longer runs, right? 

Do you have any cycle slips in the measurement series?

You should remove those if they occur before ADEV processing.

You could get better results than those presented from that technology, 
but maybe this mode isn't the best.

If you send me the data offlist I could look at it if you want.

Cheers,
Magnus



------------------------------

Message: 6
Date: Thu, 18 Mar 2010 09:14:42 +1300
From: Bruce Griffiths <bruce.griffiths at xtra.co.nz>
Subject: Re: [time-nuts] HP 5328A Divider / Timebase Output
    performance
To: Discussion of precise time and frequency measurement
    <time-nuts at febo.com>
Message-ID: <4BA13832.1070109 at xtra.co.nz>
Content-Type: text/plain; charset=ISO-8859-1; format=flowed

Bert, VE2ZAZ wrote:
> OK, I am doing a 24-hour ADEV analysis of the HP 5328A Timebase Output when set to divide-by-10,000,000. I use the 10MHz output from an HP 8644A sig.gen. OCXO. I split that 10MHz signal into two; one end goes to the the input of the HP 5328A counter. The other 10MHz end goes to the Stop input of the 5370A. The Start input gets the 5328A Timebase Output PPS. The 5370A is free running. I have included the plot of what I get so far.
>
> I would tend to say that the divider is pretty lousy for short term, but it is all fine for longer runs, right?
>
> Is this what I should expect from a TTL/ECL divider chain designed in the '70s-'80s? How would this compare to a modern divider chain, like the PIC divider or David Partridge's divider board?
>
> Since I get a straight line pretty much up to 500s or so, do I conclude that the divider dominates the system noise up to there?
>
> Of course, the 5370A timebase drift has to be taken into account but is not subtracted on that plot.
>
> Thanks,
>
> Bert.
>
>    
Bert

Trigger jitter in the 5328 input?
Trigger jitter at the 5370A input?
What are signal levels at the 5328 and 5370A inputs?
What were the input attenuator settings on the 5370A and the 5328A?
What were the input impedance settings for the 5328A and 5370A?

A well designed divider with no input trigger jitter issues will have an 
output jitter well below the 5370A noise floor when dividing down a low 
noise source.
Typical cycle to cycle jitter of  ACMOs logic is ~1ps rms.
Typical cycle to cycle jitter of  HCMOs logic is ~4ps rms.
Typical cycle to cycle jitter of  ECL logic is <1ps rms.
However using a clean well filtered power supply for the critical parts 
of the divider is advisable.

Even the noise level exhibited by the 5328 divider is well below that of 
your GPS receiver.

When comparing one low noise frequency standard against another you 
using the divider and the 5370A you can significantly reduce the effect 
of the divider noise by

1) Connect the divider output to the EXT arming input

2) Connect the divider input signal to the START input

3) Connect the frequency to be compared to the STOP input

4) Select EXT ARM operation.

The divider output then merely selects the threshold crossing of its 
input signal to start the 5370A time interval measurement.
As long as the jitter is small compared with the input signal period 
this should work well.

Bruce




------------------------------

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