[time-nuts] Fw: How to detect PLL lock
v. Bonhorst
hbonhorst at freenet.de
Sun Nov 7 16:02:57 UTC 2010
-----Ursprüngliche Nachricht-----
Von: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] Im
Auftrag von EB4APL
Gesendet: Sonntag, 7. November 2010 14:58
An: Discussion of precise time and frequency measurement
Betreff: Re: [time-nuts] Fw: How to detect PLL lock
Roberto,
The classical way is to use another phase detector with one of its
inputs shifted 90º, so it becomes an amplitude detector. Then you
filter its output and above certain reference you declare in-lock
condition. This works well even in very noisy conditions so in this
application it will function very well without much care in the
implementation.
Since we are neighbors I will elaborate this more in a talk with you.
Regards.
Ignacio, EB4APL
El 06/11/2010 22:51, Roberto Barrios wrote:
> Sorry, the links were obviously wrong:
>
> http://www.rbarrios.com/public/_MG_6553.jpg
> http://www.rbarrios.com/public/_MG_6554.jpg
> http://www.rbarrios.com/public/_MG_6556.jpg
> http://www.rbarrios.com/public/_MG_6565.jpg
> http://www.rbarrios.com/public/_MG_6567.jpg
>
> Regards,
> Roberto EB4EQA
>
> From: Roberto Barrios
> Sent: Saturday, November 06, 2010 10:48 PM
> To: time-nuts at febo.com
> Subject: How to detect PLL lock
>
> Hello,
>
> Ive built a James Miller style GPSD with a Rockwell Jupiter, 74AC86 as
phase detector and Isotemp OCXO. Division from 10Mhz to 10kHz is done with a
12F675 PIC that also outputs other frequencies and I also included a 16F88
that gives information as OCXO oven info and various GPS status indicators
got from the NMEA string. Everything is built on a PCB similar to the
Jupiter GPS. I built the PCB by plotting with a resistive pen directly on
the copper with a plotter. It works reasonably well as compared to a Trimble
thunderbolt, as per my limited knowledge. Some pictures of the result:
>
> http://www.rbarrios.com/public/_MG_6553.jpg
> http://www.rbarrios.com/public/_MG_6553.jpg
> http://www.rbarrios.com/public/_MG_6553.jpg
> http://www.rbarrios.com/public/_MG_6553.jpg
> http://www.rbarrios.com/public/_MG_6553.jpg
>
>
>
> I would also like to include PLL lock indication with a LED, but Im
struggling to find a reliable indicator. Ive tried using the OCXOs control
voltage, which stabilizes when the PLL is locked as an indicator, monitoring
it with an ADC of the PIC. Resolution is only around 14mV because of the
voltage divider before the ADC input. I cant make it react as desired to
unlocks, I tried some formulas but it is always either too strict or too
loose. Ive also timed the duty cycle of the 74AC68phase detector output
with a timer, but I guess the granurality (10Mhz/4) is too coarse to
precisely detect when its constant. For either reason, the PLL LOCK led
is lit when it shouldnt or viceversa.
>
> Does anyone have a practical, easily implementable solution for the lock
indicator in this vaguely-nut GPSDO, that this newbie could work out ?
Ideally it would be implemented in software, but I understand this modest
hardware may have severe limitations.
>
> Thank you,
> Roberto EB4EQA
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