[time-nuts] 63.8976 OCXO is useful

Ulrich Bangert df6jb at ulrich-bangert.de
Thu Dec 15 05:16:09 EST 2011


Murray,

> How useful it would be to have a DDS synthesized signal 
> generator with sub-milliHz steps, low phase noise, 
> controllable phase and output level, and 0 - 100MHz output capability!

I have just finished the work on a pcb that does exactly this and some more.
It features an AD9852 which gets it clock signal from a shaping circuit as
designed by Bruce (ADCMP600 based) which is good for frequencies in excess
of 100 MHz. In case one wants to use the DDS as an offset generator the
board features two AD8007 amplifiers which make a distribution ampfilier
with an expected isolation in the order of 80-90 dB. The DDS's
reconstruction filter is a Mini-Circuits PLP-XXX.

In addition the board features a second sine shaper to generate the
reference signal for an ADF4002 PLL also available on the board. This shaper
is limited to say 20 MHz but is known to have low phase noise (I guess lower
than the DDS's built in comparator). So you may not only generate odd
frequencies with the DDS but also use this as the reference for the pll, may
it be for "cleaning" purposes or to generate rf signals with odd
frequencies. 

The AD8007s may either be fed from the DDS directly or from the second
shaper or from the PLL's VC(X)O On board is the footprint for a
Mini-Circuits POS-XXX vco. The board also has a connector for an external
VC(X)O. All 4 connectors have a combi footprint and can be populated with
BNC as well as with SMA connectors. The PLL's loop filter is one of the more
elaborate ones of those to be found in the ADSimPLL software and can be
computed with this nice and free tool. The filter uses an AD820 op amp.
Since there is a little ICL7660 on the board which generates a negative
supply voltage for the AD820 the board should also work with VC(X)Os having
a negative tuning voltage.

The PLL and the DDS are programmed by serial data streams which are
generated by an Atmel ATMEGA32. The user in turn communicates with the micro
over a 9600/8/N/1 RS-232 port in a kind of plain text command language like
"#MUC 4 <cr><lf>" to set the PLL's multiplexer control value to "4". All bit
fiddling is done by the micro and the user needs not to concern about it.
You can tell the micro what the reference frequency of the DDS is and then
directly enter the needed DDS output frequency and re-read which ftw has
been computed. Or you can enter the ftw and re-read which frequency that
makes for a given reference frequency. All parameters can be read back by
simply putting a question mark behind the parameter. "#MUC?<cr><lf>" will
result in the answer "4<cr><lf>". All parameters are stored in a nonvolatile
eeprom and PLL and DDS will get re-programmed with the last parameters after
power up. 

And yes, I had nearly forgotten: The board features an AD654 voltage to
frequency converter which is connected to the PLL's loop voltage and
delivers pulses to an ATMEGA32 counter input. That would make it possible to
use the board as an correct implementation of the tight pll method as
discussed here ad nauseandum. Note that with the DDS in front of the PLL it
would make it possible to apply the method to a lot of odd frequency
oscillators.  

The project is more than woolgathering. I have a predecessor board up and
running which uses an AD9850 and simpler pulse shapers but is otherwise the
same as the new board. As I said I have just finished the layout and
currently I wait for the first prototype pcbs. I will keep the group
informed as I think some others may be interested in such a board as well.

The project is in general very similar to an uhf/microwave synthesizer
project that has been published by John Miles a few years ago. The
difference being that my project more aims at timing application and less to
microwave world. 

73s and best regards
Ulrich, DF6JB     

> -----Ursprungliche Nachricht-----
> Von: time-nuts-bounces at febo.com 
> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Murray Greenman
> Gesendet: Donnerstag, 15. Dezember 2011 01:18
> An: time-nuts at febo.com
> Betreff: [time-nuts] 63.8976 OCXO is useful
> 
> 
> Hi,
> 
> I can think of at least one excellent use for the unwanted 
> 63.8976MHz OCXO that comes free with some of the recently 
> offered FE-5680A units.
> 
> It would make a great reference for a DDS synthesizer, such 
> as an AD9852/AD9854. These chips have a 4x reference 
> multiplier capability, and thus would provide a clock at ~256MHz.
> 
> How useful it would be to have a DDS synthesized signal 
> generator with sub-milliHz steps, low phase noise, 
> controllable phase and output level, and 0 - 100MHz output capability!
> 
> 73,
> Murray ZL1BPU
> 
> 
> 
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