[time-nuts] FE-5680A clock shaping (sine -> square wave)

David davidwhess at gmail.com
Fri Dec 30 11:38:12 EST 2011

What kind of performance would you expect in this application?  Low
jitter?  50 ohm output?  TTL or better signal levels?  Fast rise and
fall times?  Duty cycle correction?

After reading your post I was thinking about how to go about it and
ended up with an 8 transistor discrete design using a differential
amplifier input and pair of current mirror transconductance amplifiers
for the output.  I have been looking into designing a pulse generator
for oscilloscope calibration and have an interest in GPSDOs so maybe I
will prototype this as well just to see what kind of performance a
bunch of 2N3904 and 2N4401 jelly bean transistors can provide.

On Thu, 29 Dec 2011 21:14:30 -0800, John Beale <beale at bealecorner.com>

>In case it's useful... there are many ways to get a square wave out from a 
>sine wave in, but one straightforward way is with a comparator. Some work 
>better than others. The slow ones won't work at all at 10 MHz, and the very 
>fast comparators (MAX999, ADCMP600, LT1116 etc.) are more expensive, and 
>perhaps harder to work with. I tried a MAX9013 in SO-8 package and it works 
>well for the job. You can see my schematic, circuit and scope plots at the 
>bottom of this page:
>My circuit works best with a sine wave input amplitude above 100 mVpp. 
>Below that level, the duty cycle starts to become noticeably worse. I am 
>using some hysteresis, but it may not be necessary.
>Previous to those pics on the page, you also see a circuit which did not 
>work so well, using a MAR-1 (broadband DC-1GHz MMIC amp). It's intended as 
>a linear amp, and it does not saturate in a symmetric way even with large 
>input signals.
>Here are a few other circuits of interest, which I did not try:

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