[time-nuts] FE-5680A ("New" version) fine frequency adjust

Javier Herrero jherrero at hvsistemas.es
Fri Nov 18 13:57:10 EST 2011


Hi,

I think it is a EEPROM PLD, not a FPGA, so there is no programming 
string - and probably has security enabled :)

Regards,

Javier

El 18/11/2011 19:17, Bob Camp escribió:
> Hi
>
> 1) The full resolution of the DDS is available via the RS-232 port. There is
> nothing "better" available in the FPGA.
>
> 2) Yes with enough work you can intercept the FPGA programming string. You
> then need to convert it to something you can understand. Tracing out a 24
> layer PCB with a DVM is a *lot* easier ...
>
>




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