[time-nuts] Sine to LVDS

Magnus Danielson magnus at rubidium.dyndns.org
Sat Sep 10 17:40:38 EDT 2011

On 10/09/11 22:09, Gerhard Hoffmann wrote:
> On 09.09.2011 11:52, Javier Herrero wrote:
>> I think that the same question that has been discuted here a zillion
>> times but usually around 10MHz... anyway, what would be the best way
>> to convert a sine wave to a LVDS clock (preferably duty cycle 50%) at
>> 180MHz?
>> Texas Instruments suggest a LVDS receiver as a comparator
>> http://www.ti.com/lit/an/slyt180/slyt180.pdf but time ago this was
>> discussed here, and not very favoured due to the high hysteresis of
>> the LVDS receivers.
> I don't think that hysteresis itself is any drawback. It only comes to
> effect after the decision
> to change the output state of the receiver has already been made and
> just makes sure
> that the decision is not retracted.

This is true if it really is the last thing you do. However, if you want 
to beat the noise in the slew-rate gain, keep doing linear amplification 
(well, output will be limited either by power lines or designed in 
feedback limiting diodes). Too early hysteresis will conserve the noise 
on too low slew-rate, so the timing error will be conserved as a time 
error you can't do anything about later.

For a relative high slew-rate signals like a clock signal, you should 
not need so much gain... so I wonder if we really need the hysteresis, 
but once we have the slew-rate it won't hurt much anymore.


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