[time-nuts] PICTIC II ready-made?

[Bob Camp]

Hi

The ADC input is not quite perfect. There are the usual lumps of inductance
here and there and leakage. There's also a bit of a temperature coefficient
to the capacitance and some minor voltage dependencies. I think it's likely
that your best approach would wind up with something like "external NPO cap
+ ADC" rather than just the ADC input. Still it's a cheap / easy thing to
do.

If you charge with a current around 10 ma, and run a 20 ns max pulse width,
that gives you a capacitance of about 60 pf. Running up to 100 ma is
certainly possible. 

Even if the net result is "only" 12 bits from a 16 bit part, that's still
quite good. Of course the real appeal would be to take a 10 bit (often
called 12, but they lie) ADC on a uC and maybe get 8 bits from it. If you
can start from a 10 to 20 ns pulse, that gets you to below 10 ps.

Bob

-----Original Message-----
From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On
Behalf Of Attila Kinali
Sent: Friday, April 27, 2012 10:30 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] PICTIC II ready-made?

On Wed, 25 Apr 2012 23:30:45 -0500
David <davidwhess at gmail.com> wrote:

> If you add a second lower current source or sink, then you can get
> away with a LM311 class comparator and one fast timer channel in the
> microcontroller.  The input pulse width charges the capacitor and the
> timer counts how long it takes to slowly discharge.  Since the
> conversion is integrating instead of sampling, it has better noise
> immunity.

Yes, a dual slope time strecher would work too. I'm not sure, but
i would guess this aproach would be a lot more limited by the noise
and device variations.

Usually a timing input of an uC runs with a counter in the region
of 100MHz max, ie +/-5ns resolution. To get to 50ps, one would need
to stretch it by a factor of 100 at least, better 1000 to get some
headroom for calibration in software. This means that the currents
have to have a factor of 1000 in between. Using a charge current
somewhere between 10 to 100mA would yield to a discharge current
between 10 to 100uA. Keeping the two current sources stabile
enough for the ratio to stay stable would be already quite an
acheivment. Also keeping the leakage currents at bay would be
quite some feat...

In contrast to that, a 16bit ADC is dirty cheap and a 24bits are readily
available. I haven't had a look at it yet, but if the capacitive charge
redistribution ADCs simplifiy the circuitry that much as Bruce has said,
then
you could get "easily" 16-18bit resolution. Combine that with a 100MHz
reference clock, then you get a nominal resolution 150-40fs(!). 
Acheiving 10ps resolution should be then a piece of cake and 1ps possible.
(yes, i know that 10ps is not that easy...)

			Attila Kinali

PS: please correct me if i made a wrong assumption somewhere

-- 
The trouble with you, Shev, is you don't say anything until you've saved
up a whole truckload of damned heavy brick arguments and then you dump
them all out and never look at the bleeding body mangled beneath the heap
		-- Tirin, The Dispossessed, U. Le Guin

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