[time-nuts] GPSDO Alternatives

dlewis6767 dlewis6767 at austin.rr.com
Fri Dec 7 00:09:57 UTC 2012


could you not add just a little 'glue' outside the uP to relieve it a tad.

Let the GPS' 1pps gate some ttl counters and then read for overflow or 
underflow after xxx seconds.  Have the uP determine  dac correction setting 
back to the TXCO.

-Don






--------------------------------------------------
From: "Bob Camp" <lists at rtty.us>
Sent: Thursday, December 06, 2012 5:55 PM
To: "Discussion of precise time and frequency measurement" 
<time-nuts at febo.com>
Subject: Re: [time-nuts] GPSDO Alternatives

> Hi
>
> To be useful, you need an input capture that:
>
> 1) Runs at a fast enough clock (1 GHz would be nice)
> 2) Has enough bits to get to 1 pps (say 32 bits)
> 3) Has a built in period set, so the hardware works without a lot of silly 
> stuff
>
> Often you find parts that will do some of the above, but not all. 16 bit 
> captures running off of a "few MHz" clock are pretty common. Some (but not 
> all) ARM's have 32 bit captures that run off of 10's of MHz clocks and 
> have the ability to set the period.
>
> Bob
>
>
> On Dec 6, 2012, at 6:34 PM, Lizeth Norman <normanlizeth at gmail.com> wrote:
>
>> Bob et al:
>> Have been following this thread with interest.
>> Re the input capture versus interrupt, I do believe (at least the 2560
>> does this) that you can do both. It's been a while since I looked. a
>> look at the hardware manual. Was interested in this feature to do
>> hardware timing.
>> Norm
>>
>> On Thu, Dec 6, 2012 at 6:25 PM, Bob Camp <lists at rtty.us> wrote:
>>> Hi
>>>
>>> That would be an input capture rather than an interrupt.
>>>
>>> Bob
>>>
>>> On Dec 6, 2012, at 6:16 PM, Hal Murray <hmurray at megapathdsl.net> wrote:
>>>
>>>>
>>>> albertson.chris at gmail.com said:
>>>>> You'd have to seriously divide down the output from the 10MHz OCXO if 
>>>>> you
>>>>> were going to use it as an interrupt.  Maybe to divide by 10,000? and 
>>>>> even
>>>>> at the higher clock rate you'd still have poor resolution.
>>>>
>>>>> I image each interrupt handler would sample some internal counter and 
>>>>> the
>>>>> background task would look at the delta between the two and adjust the 
>>>>> DAC
>>>>> to drive the OCXO to close the difference.   The resolution would be
>>>>> (maybe?) a "handful" of clock cycles.   Given enough time, say a 1000 
>>>>> second
>>>>> period it might wrk well enough.  I can't know without doing a more 
>>>>> detailed
>>>>> design
>>>>
>>>> Do some of the counter/timer modules have an option to run the counter 
>>>> off an
>>>> internal clock and copy the value into another register on an external 
>>>> signal?
>>>>
>>>> That avoids any interrupt latency.
>>>>
>>>>
>>>>
>>>>
>>>> --
>>>> These are my opinions.  I hate spam.
>>>>
>>>>
>>>>
>>>>
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