[time-nuts] PICTIC II questions

Attila Kinali attila at kinali.ch
Tue Feb 7 07:28:14 UTC 2012


On Sun, 5 Feb 2012 19:55:36 -0900 (AKST)
"Richard H McCorkle" <mccorkle at ptialaska.net> wrote:

>    While using a faster timebase or higher interpolator gain increases
> the resolution that doesn’t imply the accuracy will also increase. The
> PICTIC II uses CMOS logic with propagation delays that vary with
> temperature much more than the ECL logic used in a commercial counter
> like the SR620, severely affecting the accuracy below about 250ps. The
> interpolator was modeled after the SR620 design but simplified to use
> the least amount of hardware possible to reduce the size and cost. As
> the timebase rate is increased a smaller cap is used so stray
> capacitance and the capacitance of the switching devices have a larger
> effect on the charge linearity. The PICTIC II uses software calibration
> methods that are not as precise as those in a commercial counter so the
> accuracy is not specified other than to say it works well for GPS
> monitoring applications at 1ns resolution with a 10 MHz timebase once
> set up properly. If you want to log GPS data over months at a time then
> a $50 PICTIC II should be sufficient for purpose. But if you want lab
> grade accuracy over long time intervals with 25ps resolution then by
> all means use a lab grade commercial counter like the SR620 and not a
> PICTIC II!

The PICTIC II might not be lab grade, but, frankly, i don't see any
big problems in the design itself. Ie if one would replace the slow
CMOS logic by something faster, lets say an FPGA (not an expensive
highspeed one, but one in the 20-30USD range, available at Digikey/Mouser/..)
and increase the clock speed to 100 or even 200MHz, then one ought to
get a resolution in the lower ps range. And i guess, that an accuracy
of 20-50ps should be acheivable.

Or am i missing something?

BTW: does anyone know how these days low cost FPGAs perform in terms
of jitter? (the data sheets are kind of scarce in that regard). And
how do they compare to state of the art ECL logic?


Also, does one have a schematics of a current SR620?
Didier's site has a schematics, but it's from 1989 and i'd like
to see how things are done with currently available components.


			Attila Kinali


-- 
Why does it take years to find the answers to
the questions one should have asked long ago?




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