[time-nuts] FE-5680A clock shaping (sine -> square wave)

[John Beale]

>> On Thu, 29 Dec 2011 21:14:30 -0800, John Beale <beale at bealecorner.com>
>> wrote:
>>> In case it's useful... there are many ways to get a square wave out from
>>> a sine wave in, but one straightforward way is with a comparator.  [...]

FWIW, I decided on a more straightforward way to get a square wave output 
from my FE-5680A:  bypass the internal sine-wave filter, and take the 
original 10 MHz output direct from the XC9572 CPLD ! (now, I vaguely 
recall, this may have already been described on the list...)

Here's a photo of the modification I did: unsolder and rotate the 15 ohm 
resistor on CPLD pin 49, so it now feeds a short ribbon cable, which runs 
through the hole in the case intended for the (non-working) trim pot:
https://picasaweb.google.com/lh/photo/YkQseTWUZolGYd5VSwE9odMTjNZETYmyPJy0liipFm0?feat=directlink

What the square wave looks like coming out through the cable, on a TDS-210 
with 10x probe, no termination load:
https://picasaweb.google.com/lh/photo/lcFB0P5rEEd10K508nWCv9MTjNZETYmyPJy0liipFm0?feat=directlink

I see a 10 MHz 3.3V square wave with ~5 ns risetime and about 0.3 Vpp of 
ringing, probably as good as I could expect with this scope and wiring 
arrangement. I suspect this way I will get better jitter performance than I 
could expect trying to square up the standard sine wave output by whatever 
means.